26
• MAIN BOARD
IC300 LV1041M
4-16. IC BLOCK DIAGRAMS
12
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
19
17
18
20
21
32
31
30
29
28
27
26
25
24
23
22
33
44
43
42
41
40
39
38
37
36
35
34
73
74
75
76
77
78
79
80
72
65
66
67
68
69
70
71
52
51
50
49
48
47
46
45
53
54
55
56
57
58
59
60
61
62
63
64
STRIM
OSC
VOL
VOL
VCA
VCA
P
B
P
B
VCA
VCA
VCA
VCA
VCA
VCA
IEV
NOISE
GEN
NOISE
FILTER
BPF
CONTROL
CH
CONTROL
BPF
V REF
STRIM
S
MODE
RECT
RECT
DC
CUT
B NR
OUT
FILTER
DATA
DECODER
VOL/
MUTE
BPF
RECT
LOGIC
FF
LOGIC
FF
RECT
C MODE
LOGIC
LOGIC
MASTER
VOL
NF
SW
S
S
S
P
P
B
B
B
B
P
B
C
D
R
L
C
S
L
R
P
P
P
B
P
B
P
B
P
B
P
B
S
MASTER VOL
VDD
PCM
PCM
CONTROL
SRAM
IN
FILTER
R
L
C
S
R
P
B
P
B
P
B
P
B
L
L
R
L
R
R BPF2
R BPF1
S DC OUT
C DC OUT
R DC OUT
L DC OUT
V REF
VCC
C OUT
S OUT
R OUT
L OUT
GND
L IN
R IN
S IN
DELAY OUT
C VOL IN
DET
IREF
R OUT
R NF
L NF
L OUT
L BPF2
L BPF1
RT IN
LT IN
DC CUT
C MODE
GND
NS BPF1
OSC
NS BPF2
ENABLE
DATA
CLK
DATA
CLK
ENABLE2
VSS
OSC
OSC
VDD
A/D
NS
D/A
DC CUT
VCC
C VOL OUT
C OP IN
GND
C OP NF
C OP OUT
VOL REF
S OP OUT
S OP NF
S OP IN
S VOL OUT
L RECT
DC CUT4
R RECT
DC CUT3
L BPF3
VLR TH
VLR 1
VLR 2
VCS 2
VCS 1
VCS TH
L+R RECT
DC CUT2
L-R RECT
DC CUT1
R DET3
OP VREF
S VOL IN
S OUT
DC CUT