17
17
STR-DH730/DH830
STR-DH730/DH830
5-5. BLOCK DIAGRAM – DIGITAL VIDEO Section –
X3000
4MHz
HSYNC SELECT
IC3205
HSYNC SELECT
IC3204
HSYNC SELECT
IC3206
EEPROM
IC3208
1,3
CN3501
DATA 2+/2-
DATA 1+/1-
DATA 0+/0-
CLOCK +/-
CEC
SCL
SDA
HOT PLUG DETECT
+5V POWER
4,6
7,9
10,12
13
15
16
19
18
1,3
CN3500
4,6
7,9
10,12
13
15
16
19
18
14
1,3
CN3502
DATA 2+/2-
DATA 1+/1-
DATA 0+/0-
CLOCK +/-
CEC
SCL
SDA
HOT PLUG DETECT
+5V POWER
4,6
7,9
10,12
13
15
16
19
18
1,3
CN3503
DATA 2+/2-
DATA 1+/1-
DATA 0+/0-
CLOCK +/-
CEC
SCL
SDA
HOT PLUG DETECT
+5V POWER
4,6
7,9
10,12
13
15
16
19
18
1,3
CN3504
DATA 2+/2-
DATA 1+/1-
DATA 0+/0-
CLOCK +/-
CEC
SCL
SDA
HOT PLUG DETECT
+5V POWER
4,6
7,9
10,12
13
15
16
19
18
1,3
CN3505
DATA 2+/2-
DATA 1+/1-
DATA 0+/0-
CLOCK +/-
CEC
SCL
SDA
HOT PLUG DETECT
+5V POWER
4,6
7,9
10,12
13
15
16
19
18
VIDEO2
(IN 1)
VIDEO1
(IN 2)
SAT/CATV
(IN 3)
GAME
(IN 4)
BD/DVD
(IN 5)
HDMI IN
DETECTOR
Q3501
DETECTOR
Q3500
DATA 2+/2-
DATA 1+/1-
DATA 0+/0-
CLOCK +/-
CEC
SCL
SDA
HOT PLUG DETECT
+5V POWER
RESERVE
CEC
MUTE
DATA
RESET
R-SPDIF
D3003
D3004
SPDIF, MCK, SD3, SD1, SD0, SCK, WS
DE, VSYNC, HSYNC, DCK
D0 - D3, D12 - D15, D24 - D27
93-96
R[0] - R[7], G[0] - G[7], B[0] - B[7]
78,83-85,89-92
67-70,80-83,
56-63,71-75,77-
75-84,87-96,
DATA
A1P
B1P
C1P
D1P
MISO
MOSI
SPICLK
PSP_CS
X3501
27MHz
X3201
19.6608MHz
D3000
D3001
RESET
IC3003
INVERTER
IC3502
TV OUT
V
ARC
HDMI OUT
S
LJQDO
SDW
h
: VIDEO
: AUDIO (DIGITAL)
: VIDEO (DIGITAL)
Summary of Contents for STR-DH830
Page 93: ...MEMO 93 STR DH730 DH830 ...