15
4. Control Signal Block
5Vp-p
PIN No.46
CE
(R1202)
WAVEFORM 4-1
5Vp-p
PIN No.48
CLK
(R1204)
WAVEFORM 4-2
5Vp-p
PIN No.47
DATA
(R1203)
WAVEFORM 4-3
Oscilloscope Settings:
5v/div.
100us/div.
DC coupling
Trigger rising edge
Digital Processing ICs Control Signal Block
FIGURE 4-2 - DIGITAL BOARD PROCESSING IC's CONTROL BLOCK
IC1101
DIGITAL
AUDIO
I/F
RECEIVER
36
38
37
13
14
15
22
48
SDI
CLK
CE
69
68
66
62
8
IC1301
DOLBY
DIGITAL
AUDIO
DECODER
RST
IC1404
SDI
CLK
CE
R1289
R1286
R1288
1
2
3
5
R1265
R1270
R1275
82 83
12.282MHz
X3501
12.282
MHz
LR
CLK
BCLK
15
14 26
IC1401
AUDIO
DSP
HAD
CE
RST
97
70
74
41
17
IC1402
SRAM
6
25
16 26
5
4
39
IC1503AUDIOCODEC
43
11
41
17
42
30
35
28
32
29
LRCLK
MCLK
R1263 R1252
R1242
R1245 R1285
IC1202
RST 96
KHz
96
KHz
RST
CE
HAO
CE
CLK
CDTI
CDTO
RST
CLK
CLK
RST CLK
RST
CE
SDO
SDO
CE
PDO
PDI
RST
IC1201 SYSTEM CONTROL
93
92
90
111 100
110
112
X1201
16MHz
RST FROM Q108
DISPLAY BOARD
100
16
25
17
24
2A124 1367
12.282
MHz
X1401 10MHz
DATA
WE
OE
CE
11/20/01
Data and Control Line Waveforms for IC1301 and IC502
Summary of Contents for STR-DE845
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