– 68 –
Pin No.
Pin Name
I/O
Function
91
92 to 94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117 to 120
–
O
O
I
I
O
I
O
–
–
–
–
I/O
I
I
I
O
O
–
–
I
I
I
I
I
Ground
External RAM address output
Not used
Test data input “L” = normal “H” = test (Connecting to Ground)
PLL input frequency select “L” = 256Fs “H” = 128Fs (Connecting to Ground)
PLL output frequency select “L” = 768Fs “H” = 1024Fs (Connecting to Ground)
Master clock input
Master clock output (Not used)
Ground
+3.3V
Ground for PLL cell
VDD for PLL cell
PLL output/test clock input
PLL cell oscillation enable “L” oscillation enable “H” oscillation stop (Connecting to Ground)
Test data input “L” = normal “H” = test (Connecting to Ground)
Frequency counter input (Connecting to Ground)
LRCK0 divider output
BCK0 divider output
Ground
+3.3V
BCK input
BCK input
LRCK input
LRCK input
Serial data input
VSS0
EA13 to EA15
EA16
TSTA
PLDIVF
PLDIVB
CLKI
CLKO
VSS1
VDD0
AVSS
AVDD
PLLCK
XPLLEN
TST
LRCT
LROUT
BKOUT
VSS2
VDD1
BCK0
BCK1
LRCK0
LRCK1
SIA to SID
