Sony STR-DA5300ES - Multi Channel Av Receiver, Service Manual, Page: 38 / 260

STR-DA5300ES
38 38
STR-DA5300ES
6-6. BLOCK DIAGRAM – VIDEO PROCESS Section –
(Page 36)
(Page 33)
VIDEO SYSTEM CONTROLLER
IC3610 (3/3)
VIDEO PROCESSOR
IC3601
YAMAHA WAIT_N
Faroudja UCOM BUSY 142
FSCLKP D5
FSCLKN C5
FLASH MEMORY
IC3615
SD-RAM
IC3618
A3P AF4
C1P AC1
B1P AC2
A1P AB1
CVBS_IN
IPCLK2 M4
BHS L3
BVS L2
DOTCLK
HCSYNC_N
VSYNC_N
BHREF_DE K1
MSTR1_SDA
BLANK_N
CY_IN
CB_IN
CR_IN
AND
GATE
IC3609
BUFFER
IC3620
PD0 – PD23
L23 – L26, N23 – N26,
K23 – K26, J23, J24, G23 –G26,
F23 – F26, E23, E24
DCLK P24
DHS P25
DVS R26
ODCK
HSYNC
VSYNC
DEN P26
DE
B26
C26
XTAL
TCLK
X3603
19.6608MHz
F_D [0] – F_D [15]
F_A [1] – F_A [21]
FSDATA [16] – FSDATA [31]
FSADD [0] – FSADD [12]
FSADD [0] – FSADD [12]
FSCKE C4
FSBKSEL0 C21
FSBKSEL1 C20
FSCS0 D21
FSRAS C24
FSCAS D24
FSWE C23
FSDQM3 B22
FSDQM2 B17
FSDQS3 A22
45
46
44
26
27
24
23
22
21
20
47
16
A17
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
51
ROM_CS_N AD24
OCN_RE_N AC25
OCN_WE_N AC26
26
28
11
CE
OE
WE
12 RESET
FSDQS2
SD-RAM
IC3602
FSDATA [0] – FSDATA [15]
CLKP
CLKN
CKE
FSBKSEL0
FSBKSEL1
FSCS0
RAS
CAS
WE
CLKP CLKN CKE FSBKSEL0 FSBKSEL1 FSCS0 RAS CAS WE
FSDQM1 A11
FSDQM0 A6
FSDQS1 B11
45
46
44
26
27
24
23
22
21
20
47
16
B6 51 FSDQS0
BDATA21
I
BDATA16
BDATA13
I
BDATA8
FSDATA16 –
FSDATA31
FSDATA0 –
FSDATA15
DQ0 – DQ15
A0 – A12
DQ0 – DQ15
A0 – A20
I/O0 – I/O15 A0 – A16
DQ0 – DQ15
A0 – A12
FSADDR0 –
FSADDR12
OCMDATA0 –
OCMDATA15
OCMADDR1 –
OCMADDR21
BDATA5
I
BDATA0
J1 – J3,
H1 – H3
G3, F1 – F3,
E1, E2
D2, D3,
C1 – C3, B1
DR0 – DR5
DG0 – DG5
DB0 – DB5
111 – 116
DR0 – DR5
119 – 124
DG0 – DG5
127 – 132
DB0 – DB5
139
137
136
138
DOTCLK
HCSYNC_N
VSYNC_N
BLANK_N
WAIT_N
23
YAMAHA INT_N
INT_N
25
YAMAHA RESET
YAMAHA CE
RESET_N
39
CS_N
28
WR_N
29
RD_N
30
Faroudja Power DETECT 125
MSTR1_SCL A3
Faroudja UCOM UART TX 141 OCM_UDI_1 B3
Faroudja UCOM UART RX 140 OCM_UDO_1 B2
Faroudja UCOM RESET
126
RESET AD9
119 22 21
15 – 22
D0 – D7
46 – 56, 59 – 63
SRAM IO0 – SRAM IO15/
YAMAHA D0 – YAMAHA D7/
EXT_ROMD00 – EXT_ROMD15
64 – 72, 75 – 83
SRAM A0 – SRAM A16/
YAMAHA PS0 – YAMAHA PS2/ EXT_ROMA00 – EXT_ROMA16
33 – 31
PS0 – PS2
DIR
1
XOE
19
18
BUFFER
IC3619
XOE
19
YAMAHA_D [0] –
YAMAHA_D [7] YAMAHA_A [0] –
YAMAHA_A [2]
SRAM CE
CE
6
19
SRAM LB,WE
1
26
SRAM UB,WE/YAMAHA WR_N/
EXT_ROM WE
2
27
SRAM OE,UB,LB/YAMAHA RD_N/
EXT_ROM OE
25
3
10 9
8
12 13
11
17 40 39
WE UB LB
41
OE
Flash Update RX 134
Flash Update TX 135
MAIN UCOM UART RX 137
MAIN UCOM UART TX 138
MAIN UCOM UART BUSY
139
D [8] – D [15]
D [0] – D [15]
D [0] – D [15]
A [0] – A [2]
A [0] – A [17]
A [1] – A [17]
RX232C
TX232C
VUCOM_RX
VUCOM_TX
VUCOM_BUSY
STOP IN 6
INITX 131
STOP
VUCOM_RST
ENDFLAG 136 VUCOM_FLG
MD2 128 VUCOM_MD
FLASH MEMORY
IC3603
EEPROM
IC3621
34
13
74
73
OE
WE
MOE_N
MWE_N
Y_D [0] – Y_D [15]
Y_A [0] – Y_A [23]
OSD CONTROLLER
IC3604
142
141
XOUT
XIN
X3601
33.2MHz
39
40
X0
X1
X3602
4MHz
S-RAM
IC3611
DATA BUS
DATA BUS
ADDRESS BUS
DATA BUS ADDRESS
BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
14 RESET
39
26
30
NON_LPCM 92
NON_LPCM
51
38
A2P AF1 Y_IN
B2P AE2 C_IN
C3P AF5 2ND_ZONE_IN
B3P AE5 CAMERA_IN
UC3V_SCL UC3V_SDA
44
23 P_HSYNC
50 S_HSYNC
24 P_VSYNC
49 S_VSYNC
V
Y/G
SDA
21
SCLK
22
RESET
33
39
VOUT
CY OUT
CB/R 38 CB OUT
CR/B 37 CR OUT
HSYNC
VSYNC
DE
ODCK
DAC_CLK_SEL VDAC_RESET
4 – 9, 12, 13,
16 – 18, 26 – 30
Y0 – Y7,
C0 – C7
25 P_BLANK
48 S_BLANK
32 CLKIN_A
FREQUENCY
MULTIPLIER
IC3854
D/A CONVERTER
IC3850
2 8
4
IN OUT2
FSO
41
40 42 Y YOUT
43 C COUT
VDAC_RESET
32
DAC CLOCK SEL
7
DAC_CLK_SEL
VDAC_RESET
24
16
32
UC3V_SDA,
UC3V_SCL
33
• SIGNAL PATH
: VIDEO
A2
MSTR0_SDA AA23 SDA 5
MSTR0_SCL AA24 SCL 6
Q [4] -Q [11],
Q[16] -Q[23], Q[28]-Q[35]
ODCK, HSYNC, VSYNC, DE
Q [4] -Q [11],
Q[16] -Q[23],
Q[28]-Q[35]
Q[16] -Q[23],
Q[28]-Q[35]
DQ0 – DQ15
A0 – A23
MD0 – MD15
MA1 – MA24
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