Sony SPP-M920 Primary, Service Manual

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Pin No. Pin name I/O Description
46 AD00 I/O Data bus (EXTERNAL ROM VERSION ONLY).
47 AD01 I/O Data bus (EXTERNAL ROM VERSION ONLY).
48 AD02 I/O Data bus (EXTERNAL ROM VERSION ONLY).
49 AD03 I/O Data bus (EXTERNAL ROM VERSION ONLY).
50 AD04 I/O Data bus (EXTERNAL ROM VERSION ONLY).
51 AD05 I/O Data bus (EXTERNAL ROM VERSION ONLY).
52 AD06 I/O Data bus (EXTERNAL ROM VERSION ONLY).
53 AD07 I/O Data bus (EXTERNAL ROM VERSION ONLY).
54 DV
CC
3 – Digital power supply terminal (+3V).
55 RING O Ringer signal output terminal.
56 DV
SS
3 – Digital power supply terminal (Ground).
57 PLLREF O 18.25MHz PLL reference frequency output terminal.
58 WAKEUP I Activation input for intermittent reception (stand-by cancellation input).
59 INT0 – Not used (Open).
60 INT1 – Not used (Open).
61 DV
SS
4 – Digital power supply terminal (Ground).
62 XTAL1 I System clock oscillator input (18.25MHz).
63 XTAL2 O System clock oscillator output (18.25MHz).
64 DV
CC
4 – Digital power supply terminal (+3V).
65 SCLK O Serial clock output to the EEPROM (IC11) and PLL (IC2).
66 SD IN I Serial data input from EEPROM (IC11).
67 SD OUT O Serial data output to EEPROM (IC11) and PLL (IC2).
68 CS O Chip select output to the EEPROM (IC11).
69 PLL EN O Enable output to the PLL (IC2).
70 IL EN O Input latch enable terminal.
71 TX EN O TX circuit enable terminal.
72 CL EN O Output latch enable terminal.
73 CID ROUT O CID message routing control.
74 TX BB O TX data output terminal.
75 RX BB I RX data output terminal.
76 – Not used (Open).
77 – Not used (Open).
78 – Not used (Open).
79 – Not used (Open).
80 TST0 – Mode selection monitor terminal.
81 RESET I/O System reset terminal.
82 AV
CC
2 – Analog power supply terminal (+3V).
83 BATMON I Battery level detection input.
84 AV
SS
1 – Analog power supply terminal (Ground).