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5-4
5-5.
SER
V
O/SYSTEM CONTR
OL,
OSD MICR
OPR
OCESSOR PIN FUNCTION (MA-377 BO
ARD IC101)
Pin No.
Pin Name
I/O
Function
1
SW1
O
T
uner system control-1 signal output
2
AN GND
–
Analog g
round
3
APC ERR
OR
I
APC error v
oltage signal input
4
ETR1
I
Easy timer knob pulse1 signal input
5
FUNC
. KEY2
I
Function k
e
y analog v
oltage signal input
6
TU AFT
I
A
uto fine tuning signal input
7
FUNC
. KEY1
I
Function k
e
y analog v
oltage signal input
8
PO
WER F
AIL
I
P
o
w
er f
ailure detect signal input
9
ETR2
I
Easy timer knob pulse2 signal input
10
DEST
I
Destination set signal input
11
S SENS
I
Supply end sensor signal input
12
T SENS
I
T
ak
e up end sensor signal input
13
VIDEO RF
I
Video RF en
velop signal input
14
A
U RF
I
Hi-Fi audio en
v
elop signal input
15
UN 5V
–
P
o
w
er supply analog 5V
16
RESET
I
Reset signal input
17
SW 2
O
T
uner system control 2 signal output
18
P
A
L
O
“H
”:
P
AL (video b
loc
k control signal output)
19
OSD MIX
O
“H
”: MESECAM mode set
20
SP
–
Not used
21
NAPB
O
Nor
mal audio PB signal output
22
VCC
–
P
o
w
er supply uns
witch 5V
23
AF SWP
O
AF s
witching pulse signal output
24
RF SWP
O
RF s
witching pulse signal output
25
CAP
VS
O
Capstan error signal output
26
DR
UM
VS
O
Dr
um motor error signal output
27
QVD
O
Quasi
VD pulse signal output
28
C R
O
T
A
R
Y
–
Not used
29
H.AMPSW
O
“H
”:
A-DUB mode (CTL amp
. gain control signal output)
30
COMP
–
Not used
31
CTL (+)
I/O
CTL head signal input/output (REC mode)
32
CTL (-)
I/O
CTL head signal input/output (REC mode)
33
VSS (SER
V
O
)
–
Ser
v
o g
round
34
CTL-AMP1
I
CTL amp
. control signal input (gain set)
35
CTL-AMP2
I
CTL amp
. control signal input (gain set)
36
CTL-AMP3
I
CTL amp
. control signal input (gain set)
37
CTL-AMP OUT
O
CTL amp
. control signal output (f
or chec
k)
38
DR
UM FG
I
Dr
um FG schmitt amp
. input
39
DR
UM PG
I
Dr
um PG schmitt amp
. input
40
CAP FG
I
Capstan FG schmitt input
41
VCC (SER
V
O
)
–
P
o
w
er supply uns
witch 5V
42
VCC (OSD)
–
P
o
w
er supply OSD 5V
43
VIDEO IN
I
Composite video signal input
44
VREF
I
Ref
erence bias and clamp bias po
w
er signal input
45
VIDEO OUT
O
Composite video signal output
46
CHAR BIAS
–
Not used
47
AFC LPF
I
AFC LPF signal input
48
AFC OSC
I
AFC oscillation signal input
49
VSS (OSD)
–
OSD g
round
50
DOSC IN
I
OSC dot cloc
k oscillator signal input
Pin No.
Pin Name
I/O
Function
51
DOSC OUT
O
OSC dot cloc
k oscillator signal output
52
4FSC OUT
O
OSC 4fsc oscillator ter
minal signal output
53
4FSC IN
I
OSC 4fsc oscillator ter
minal signal input
54
CSYNC
I
Composite sync signal input
55
REC PRF
I
Erasing protection tab
. cassette in detection signal input
56
IIC D
A
T
A
O
EEP ROM, Hi-Fi IC
, RR IC
, tuner/ser
ial comm
unication data signal output
57
IIC CLOCK
O
EEP ROM, Hi-Fi IC
, RR IC
, tuner/ser
ial comm
unication cloc
k signal output
58
DRUM QR
O
Drum motor step driving signal output
59
PB
–
Not used
60
AF REC P
O
“L
”:
output when Hi-Fi audio REC pause (Not used)
61
TV/VTR
–
Not used
62
IIC CLOCK (VIDEO)
O
Video
, video amp
. ser
ial comm
unication cloc
k signal output
63
IIC
D
A
T
A
(VIDEO)
O
Video
, video amp
. ser
ial communication data signal output
64
BLUE BACK
O
OSD block control signal output
65
APC PWM
O
APC PWM signal output
66
CAP
TRQ PWM
O
Capstan
TRQ PWM signal output
67
SECAM ON
O
“L
”:
SECAM mode set dur
ing PB
68
TEST
I
Fixed to ground
69
32kHz (OUT)
O
Timer cloc
k ter
minal (32kHz) output
70
32kHz (IN)
I
Timer cloc
k ter
minal (32kHz) input
71
VSS
–
Ground
72
10MHz (IN)
I
System cloc
k ter
minal (10MHz) input
73
10MHz (OUT)
O
System cloc
k ter
minal (10MHz) output
74
END LED
O
T
op/end LED on/off control signal output
75
POWER CONT
O
Power supply control signal output
76
RR CLK
–
Not used
77
RR D
A
T
A
–
Not used
78
OSD SELECT
O
OSD X' tal select (P
AL/NTSC) signal output
79
A MUTE
O
“H
”: audio mute signal output
80
WRITE CONT
O
EEP ROM write timing control signal output
81
IN SEL
O
Line-input selection control signal output
82
REMOCON
I
Remote control (SIRCS) signal input
83
CAM
O
CAM motor control signal output
84
MODE1
I
Mechanism section CAM encoder data 1 input
85
MODE2
I
Mechanism section CAM encoder data 2 input
86
MODE3
I
Mechanism section CAM encoder data 3 input
87
MODE4
I
Mechanism section CAM encoder data 4 input
88
T
REEL
I
T side reel FG input
89
S REEL
I
S side reel FG input
90
FLD
CS
O
FIP driver chip select signal output
91
FULL
ERASE
O
Full erase head on/off control signal output
92
REC P
O
“L
”: output when REC pause
93
CAP
R
VS
O
Capstan reverse control signal
“H
”: when reverse
94
CAP
QR
O
Capstan step driving signal output
95
S CLOCK
O
Serial communication clock signal output
96
S IN
I
Serial communication data signal input
97
S OUT
O
Serial communication data signal output
98
PLL
CLOCK
O
T
uner PLL cloc
k signal output
99
TU
ENABLE
O
T
uner PLL chip select signal output
100
PLL
D
A
T
A
O
T
uner PLL data signal output
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