– 45 –
– 46 –
– 47 –
PMC-D407L
6-13. SCHEMATIC DIAGRAM — MAIN SECTION — • Refer to page 64 for IC Block Diagrams.
Note:
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
C
: panel designation.
•
U
: B+ Line.
• Voltages are dc with respect to ground under no-signal
(detuned) conditions.
no mark : FM
(
) : PB
<
> : REC
[
] : CD
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Signal path.
F
: FM
E
: PB
a
: REC
L
: LINE IN
J
: CD
c
: digital out
(Page 41)
(Page 47)
(Page 32)
(Page 41)
(Page 51)
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(Page 61)
(Page 45)
(Page 31)
(Page 31)
