
CMOS Setup Options
69
Chip Configuration Sub-Menu
SDRAM Timing
[By SPD]
User Define
SDRAM CAS Latency
[3T]
SDRAM RAS to CAS Delay
[4T]
SDRAM RAS Precharge Time
[3T]
Refresh RAS Assertion
[5T]
4T
6T
7T
Refresh Queue Depth
[12]
0
4
8
SDRAM Refresh Mode
[Simultaneous]
Staggered 1T
Memory Hole At Address
[None]
15M-16M
14M-16M
12M-16M
Video Memory Cache Mode
[USWC]
UC
Graphics Aperture Size
[64MB]
128MB
256MB
4MB
8MB
16MB
32MB
VGA Shared Memory Size
[ 8MB] (actual size depends on model)
16MB
32MB
64MB
2MB
4MB
Summary of Contents for PCV-LX700 - Vaio Slimtop Computer
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