Sony Network Walkman NW-HD3, Service Manual

Page: 32 / 54

NW-HD3
32 32
NW-HD3
•
IC Block Diagrams
– MAIN Board –
IC3001 CXR710160-211GH IC4301 AN17020A-VB
ARM77TDMI
CPU CORE
VIRTUAL ENGINE
CORE
HUFFMAN HW
MAGIC GATE
CORE
CLOCK GENERATOR/
SYSTEM CONTROLLER
DMAC (CH0)
DMAC (CH1)
DMAC (CH2)
WATCHDOG
TIMER
PRESCALLER/
TIME BASE TIMER
RAM
160K BYTES
RAM
512K BYTES
EEPROM SERIAL
INTERFACE
CD-ROM
INTERFACE
DAC
INTERFACE
DMAC (CH3)
SERIAL INTERF
ACE
(CH0)
UAR
T (CH0)
UAR
T (CH1)
RAM
2 8 2
TRST TDO TMS VDIO3 TDI TCK TEST0 DVSS1 DVDD3 TEST2 TEST1 TEST4 TEST3 TEST5 TEST6 VDIO2
LRCKI
BCKI
VDIOCD0
PCMDI
DVDD4
TEST8
TEST7
DVDD0
DVSS0
VDIO0
VDIOCD1
PF4/XRDE
PI3/BCKO
PI2/LRCKO
PI0/PCMDO
EVA
DVDD2
DVSS2
PC3/SCS0
PC2/SI0
PC1/SO0
VDIOCD2
PC0/SCK0
PF3/T3
PF2/EC2/INT4
PF1/T1
PF0/EC0/INT3
RST
KCS
VDIO1
KDO
KDI
KRB
DVDD1
DVSS3
A
VDPLL
A
VSPLL
A
VSOSC
A
VDMO EXT
AL
XT
AL
XIN
OSSEL
KCLK
INTERRUPT CONTROLLER
8-BIT TIMER (CH7) 8-BIT TIMER (CH6) 8-BIT TIMER (CH5) 8-BIT TIMER (CH4)
8-BIT TIMER (CH3) 8-BIT TIMER/COUNTER (CH2) 8-BIT TIMER (CH1) 8-BIT TIMER/COUNTER (CH0)
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
42
41
40
39
38
37
36
35
34
33
44
43
PE3/RxD1 48
PE2/TxD1 47
PE1/RxD0 46
PE0/TxD0 45
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64 63 62 61 60 59 58 57 56 55 53 54 52 51 50 49
2
1
4
3
GND
CH1 IN
VCC 1HV
CH2 IN
15 16 13 14
+
−
MUTING CTRL CH1 SENS BEEP
6 5 8 7
VCC1
RF
VCC2
VCC 2HV
BEEP
LINE AMP
HEADPHONE AMP
MUTING
+
− LINE AMP
HEADPHONE AMP
12
11
9
10
CH1 OUT
PGND
CH2 SENS
CH2 OUT
REF1
VREF
REF2
HP/LINE
SWITCH
IC5001 SM8142BD-G-EL
1
VSS
8
LDR
2
OSC
7
CHV
3
ENA
6
OUT1
4
VDD
5
OUT2
HIGH VOLTAGE
SWITCHING CIRCUIT
DIVIDING
CIRCUIT
DIVIDING
CIRCUIT
OSCILLATOR
FOR
BOOSTING VOLTAGE AND EL DRIVING
IC8000 HAAM-301BS
10
Z OUT (A)
9
Y OUT (A)
8
X OUT (A)
7
C SET
6
VCC
1
GND
2
F SET
3
Z OUT (D)
4
Y OUT (D)
5
X OUT (D)
DUTY CYCLE
MODULATOR
DEMULTI-PLEXER
MULTI-PLEXER
S/H
AMPLIFIER
EEPROM
Y SENSOR
S/H
X SENSOR
S/H
Z SENSOR
Ver. 1.3