
MZ-DH10P
24
24
MZ-DH10P
•
Note For Printed Wiring Boards and Schematic Diagrams
•
MAIN board is multi-layer printed board.
However, the patterns of intermediate-layer have not been in-
cluded in this diagrams.
•
Lead Layouts
Note on Schematic Diagram:
•
All capacitors are in
µ
F unless otherwise noted. (p: pF)
50 WV or less are not indicated except for electrolytics
and tantalums.
•
All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
f
: internal component.
•
C
: panel designation.
•
A
: B+ Line.
•
Power voltage is dc 3.7 V and fed with regulated dc power
supply from rechargeable battery terminal.
•
Voltages and waveforms are dc with respect to ground
under no-signal conditions.
no mark : PLAYBACK
[
] : PLAYBACK (SERVO OFF)
(
) : PLAYBACK (SERVO ON)
∗
: Impossible to measure
•
Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
•
Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
•
Circled numbers refer to waveforms.
•
Signal path.
E
: PLAYBACK
j
: REC
d
: USB input from PC
G
: USB output to PC
Note on Printed Wiring Board:
•
X
: parts extracted from the component side.
•
Y
: parts extracted from the conductor side.
•
z
: Through hole.
•
f
: internal component.
•
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
Caution:
Pattern face side:
Parts on the pattern face side seen from
(Conductor Side)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(Component Side)
the parts face are indicated.
surface
Lead layout of conventional IC
CSP (chip size package)
Caution:
Pattern face side:
Parts on the pattern face side seen from
(Side B)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(Side A)
the parts face are indicated.
Note: The components identified by mark
0
or dotted line
with mark
0
are critical for safety.
Replace only with part number specified.
5
IC501
ra
(FE) (Servo on)
20 mV/DIV, 1
µ
s/DIV
Approx.
60 mVp-p
4
IC501
8
(RFO) (Servo on)
500 mV/DIV, 100 ns/DIV
1.2 Vp-p
3
IC501
1
(IX) (Servo on)
50 mV/DIV, 200 ns/DIV
190 mVp-p
7.6 ms
2.2 Vp-p
1
IC701
1
(VI1),
2
(WI1),
th
(UI1) (Servo on)
1 V/DIV, 5
m
s/DIV
2
IC701
tg
(PWM1) (Servo on)
1 V/DIV, 5
µ
s/DIV
11.3
µ
s
2.5 Vp-p
6
IC501
rs
(TE) (Servo on)
100 mV/DIV, 1
µ
s/DIV
Approx.
350 mVp-p
7
IC501
wh
(CLK) (Servo on)
1 V/DIV, 50 ns/DIV
88 ns
3 Vp-p
8
IC901
yd
(CLK)
1 V/DIV, 5
µ
s/DIV
5.7
µ
s
2.7 Vp-p
9
IC351
wd
(MCK)
1 V/DIV, 20 ns/DIV
44.3 ns
1.8 Vp-p
q;
IC871
8
(OSCOUT)
500 mV/DIV, 10
µ
s/DIV
30.5
µ
s
1 Vp-p
qa
IC801
<czz
(OSCO)
1 V/DIV, 20 ns/DIV
44.3 ns
2.7 Vp-p
•
Waveforms
– MAIN Board –
• The voltage and waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
form that of conventional IC.
*
Replacement of IC401, IC501, IC601, IC801 and IC802
used in this set requires a special tool.
*
Replacement of IC401, IC501, IC601, IC801 and IC802 used
in this set requires a special tool.