68
68
MXD-D4
3
2
1
15
16
VINR
4
VREF (N)
5
VREF (P)
6
SFOR
7
PWON
8
SYSCLK
VREF
VINL
VSSA
14 FSEL
13 DATAO
12 WS
11 BCK
10 VSSD
9 VDDD
VDDA
+
–
+
–
ADC
( )
ADC
( )
DECIMATION
FILTER
DIGITAL
INTERFACE
DC-
CANCELLATION
FILTER
CLOCK
CONTROL
1
2
3
4
5
6
7
8
9
10
GND
MOTOR
DRIVE
NOISE
FILTER
CLAMP
FWD.IN
REV.IN
VCC 1
VCC 2
NOISE
FILTER
MOTOR
DRIVE
MOTOR
DRIVE
MOTOR
DRIVE
T.S.D
O.C.P
FWD/REV/STOP
CONTROL LOGIC
3
2
1
32
33
VSSD
4
VSSD (C)
5
L3DATA
6
L3CLOCK
7
DATAI
8
BCKI
9
WSI
10
L3MODE
11
NC
VDDD (C)
RESET
VDDA (PLL)
31 VSSA (PLL)
27 VDDA
26 VSSA
25 VSSA (DAC)
24 VREF
23
12
TC
BCKO
29
30
CLKOUT
28 NC
PREEM1
MUTE
44
RTCB
43
VDDD
42
PREEM0
41
NC
40
NC
37
WSO
36
DATAO
39
TEST2
38
NC
35
SELSTATIC
34
TEST1
13
SELCHAN
14
NC
15
SPDIF0
16
SPDIF1
17
V
DDA (DAC)
18
VOUT L
19
SELCLK
20
SELSPDIF
21
LOCK
22
VOUT R
L3
INTERFACE
IEC 958
DECODER
DATA
OUTPUT
INTERFACE
CLOCK
AND
TIMING
CIRCUIT
DATA
INPUT
INTERFACE
AUDIO FEATURE PROCESSOR
INTERPOLATOR
NOISE SHAPER
DAC
DAC
• IC Block Diagrams
– MAIN Board –
IC300
µDA1350AH
IC301
µDA1360TS
IC400, 401
LB1641
6-22. PRINTED WIRING BOARD – HP Board –
•
See page 48 for Circuit Boards Location.
6-23. SCHEMATIC DIAGRAM – HP Board –
(Page 57)
(Page 60)