6
ICD-BP100/BP120
SECTION 3
DIAGRAMS
Note on Schematic Diagrams:
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
f
: internal component.
•
C
: panel designation.
•
A
: B+ Line.
• Power voltage is dc 3V and fed with regulated dc power
supply from battery terminal.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : REC
(
) : PB
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
E
: PB
a
: REC
*
Replacement of IC109 used in this set requires a special
tool.
•
The voltage and waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
from that of conventional IC.
Note on Printed Wiring Boards:
•
Y
: parts extracted from the conductor side.
•
b
: Pattern from the side which enables seeing.
Caution:
Pattern face side:
Parts on the pattern face side seen from
(SIDE B)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(SIDE A)
the parts face are indicated.
*
Replacement of IC109 used in this set requires a special
tool.
•
Lead layouts
r
WAVEFORMS
surface
Lead layout of
conventional IC
CSP (chip size package)
VOLT/DIV : 0.5 V AC
TIME/DIV : 50 nsec
VOLT/DIV : 0.2 V AC
TIME/DIV : 10
