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45
Pin No.
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95 to 97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
I/O
I
O
—
O
—
I
I
I
—
I
—
—
—
—
I
—
—
—
—
—
—
O
—
—
—
—
—
—
—
—
—
—
I
—
O
O
O
O
O
O
O
—
—
I
—
I
Description
Fix the video signal output level control
Reference voltage (+1.235V) output terminal
Power supply terminal (+3.3V) (for D/A converter)
Chrominance video signal output terminal
Ground terminal (for D/A converter)
GCK (pin
<z/b
) selection terminal “L”: external clock, “H”: internal clock (fixed at “H”)
DA-XCLK (pin
ih
) selection (1) terminal Fixed at “H” in this set
DA-XCLK (pin
ih
) selection (2) terminal Fixed at “H” in this set
Ground terminal
Selection the operation clock 42.336 MHz (fixed at “L”)
Power supply terminal (+3.3V)
Not used (open)
Not used (open)
Ground terminal (for PLL system)
Main reference clock signal (16.9344 MHz=384fs) from the D/A converter (IC509)
Power supply terminal (+3.3V) (for PLL system)
Not used (open)
Vertical synchronized signal output to the CD mechanism controller (IC502)
Power supply terminal (+3.3V) (for PLL system)
Not used (open)
Ground terminal (for PLL system)
Ground terminal
Not used (open)
Not used (open)
Power supply terminal (+3.3V)
Not used (open)
Ground terminal
Not used (open)
Main clock for video signal processor input from the D/A converter (IC509)
Not used (open)
Digital audio L/R sampling clock signal (44.1 kHz) output to the D/A converter (IC509)
Fix the maximum output voltage (+5V) certain output terminal
Digital audio data output to the D/A converter (IC509)
Digital audio bit clock signal (2.8224 MHz) output to the D/A converter (IC509)
Serial data output to the CD mechanism controller (IC502)
Ready signal output to the CD mechanism controller (IC502)
Interrupt request signal output to the CD mechanism controller (IC502)
Not used (open)
Ground terminal
Serial data transfer clock signal input from the CD mechanism controller (IC502)
Power supply terminal (+3.3V)
Serial data input from the CD mechanism controller (IC502)
Pin Name
RREF
VREF
AVDD-DAC
C-OUT
AGND-DAC
CLK-SEL0
CLK-SEL1
CLK-SEL2
VSS
RESERVED
VDD3
DA-EMP
RESERVED
AGND-PLL
DA-XCLK
AVDD-PLL
PGIO4
PGIO5
PGIO6
PGIO0
PGIO8
PGIO2/VSYNC/
CSYNC
AVDD-PLL
NC
AGND-PLL
VSS
NC
PGIO3/HSYNC
VDD3
PGIO1/VCK-OUT
VSS
GCKI
VCK-IN
GCKOUT/DA-EMP
DA-LRCK
VDDMAX-OUT
DA-DATA
DA-BCK
HD-OUT
HRDY
HINT
CDG-SCK
VSS
HCK
VDD3
HD-IN