HCD-X10
33
33
HCD-X10
P_CONT3
0.2
3.2
1.9
2.6
3.2
0
0
3.2
3.2
3.4
3.4
0
3.2
3.3
3.4
0
3.2
0
3.2
0
3.2
(3.2)
0
(3.2)
(3.2)
(3.2)
(3.2)
(3.2)
3.2
0
(3.2)
(3.2)
0
3.2
(2.4)
(3.2)
(0)
(*)
0
0
3.3
0
3.3
0
3.4
3.4
3.3
3.3
3.3
3.3
0
3.2
3.3
3.3
3.3
3.3
3.2
3.3
0
3.2
3.2
0
0
0
0
0
0
3.4
3.4
3.2
3.2
3.2
3.4
3.2
3.3
(0)
0
3.3
3.3
3.3
3.2
3.2
1.6
1.3
1.2
3.2
0
3.2
3.2
3.3
3.4
(3.3)
0
0
0
3.2
3.6
4
3.4
R506
1k
R525
10k
10k
R524
10k
R527
R523
10k
R522
10k
10k
R519
0.1
C515
0
R536
0.1
C517
10k
R539
47k
R556
47k
R557
2SC3052EF-T1-LEF
Q503
100k
R561
47k
R562
0.22
C520
10k
R563
0.01
C521
5
4
3
2
1
PST3635NR
IC503
OUT
VDD
GND
NC
Cd
0.1
C523
0.22
C522
10k
R558
R593
10k
R595
10k
0
R591
0.1
C518
1k
R550
0.1
C519
10k
R554
100
R509
100
R511
10k
R510
10k
R512
0.1
C501
0.1
C502
0.1
C508
0.1
C503
0.1
C507
100
R513
10k
R514
4.7k
R549
4.7k
R552
R547
0
R582
0
R542
5MHz
X501
10k
R534
10k
R584
100
R503
1k
R501
DSP_DIR
100
R676
100
R639
100
R617
10k
R638
100
R666
100
R665
1000p
C616
1000p
C617
47k
10k
R515
MA2J1110GLS0
D501
100
R517
1000p
C506
47p
C618
R644 47k
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
IC501
M30626MJP-A13FPU0
DAMP_SCDT/DIR_DIN
DAMP_SHIFT/DIR_CLK
CEC_RX_IN
SIRCS_IN
DSP_MOSI
DSP_MISO
DSP_SPICLK
BYTE
CNVss
DSP_SPIDS
DSP_RESET
RESET
Xout
Vss
Xin
Vcc
NMI
DIR_ZERO
DIR_CSFLAG
DRIVE_OCP(DIAG)
DIR_HCE
CEC_TX_OUT
DIR_RST
LED_PWM2
DC_DETECT
LED_PWM1
DIR_ERR
LED_PWM3
I2C_CLK
I2C_
DATA
DVD_SID
DVD_SOD
DVD_SCO
DVD_XIFBUSY
CLINK_TX_OUT
CLINK_RX_IN
DVD XIFCS
MTK RST
SACD_SEL
DIR_XSTATE
V_SEL0
V_SEL1
V_SEL2
V_SEL3
V_SEL4
DSP_SF_CE
TV_SEL
CLINK_SEL
A_SEL0
A_SEL1
A_SEL2
A_SEL3
A_SEL4
MICSW
TUNED
ST_CLK
ST_DO
ST_CE
ST_DI
DAMP INIT
DAMP SOFT MUTE
Vcc
DAMP LATCH1
Vss
DAMP LATCH2
DAMP LATCH3
DRIVE_RST(EN)
DSP_INTR
OVERFLOW1
OVERFLOW2
P_CONT1
P_CONT2
AC_CUT
KEY INT
RDS CLK
RDS DATA
P_CONT3
P_CONT_TS
KEYIN1
KEYIN2
CS
CLK
MODE
FL_RST
FL_CLK
FL_D_OUT
FL_CS
CDM_OPEN_SW
CLINK_DET
DSP_MASTER
P_CONT4
DESTINATION
MODEL
KEY2
KEY1
Vss
KEY0
Vref
Vcc
DIR_HDOUT
SW+3.3V
BUP+3.3V
E+3.3V
E+4V
D-GND
F
D
C
B
E
IFSDI1
IFSDO1
IFSCK1
XIFBSY1
XIFCS
XSYSRST
RDS_DATA
RDS_CLK
DIR_DO
OVF1
OVF2
LAT3
LAT2
LAT1
SOFT_MUTE
NS_INIT
DIR_RST
ST_DI
ST_CE
ST_CLK
A_SEL4
A_SEL2
A_SEL1
A_SEL0
CLINK_SEL
V_SEL4
V_SEL3
V_SEL2
V_SEL1
P_CONT1
P_CONT2
P_CONT3
P_CONT3
FL_CLK
FL_DATA
FL_CS
FL_RST
TV_SEL
LED_PWM1
LED_PWM2
CS
CLK
MODE
LED_PWM3
CLINK_TX_OUT
DC_DETECT
EN
ST_DO
AC_CUT
P_CONT4
P_CONT4
P_CONT4
KEYIN2
MICSW
TUNED
V_SEL0
CLINK_RX_IN
A_SEL3
P_CONT1
P_CONT1
P_CONT2
P_CONT2
AC_CUT
KEY0
P_CONT_DSP
SACD_SEL
DSP_INT
SHIFT_DIR_CLK
SHIFT_DIR_CLK
DIAG
DIR_HCE
CSFLAG
DIR_ZERO
DSP_RESET
DSP_SPIDS
DSP_SPICLK
DSP_MOSI
SCDT_DIR_SDATA
SCDT_DIR_SDATA
SIRCS
OCSW1SIG
CEC_RX_IN
RESET
CEC_TX_OUT
KEYIN1
CLINK_DET
DIR_XSTATE
CNVSS
IC501
SYSTEM CONTROLLER
IC503
RESET SIGNAL GENERATOR
MAIN BOARD (1/11)
R505
R504
4.7k (AEP,UK)
22k (US,CND)
(US,CND)
RESET SWITCH
A
10
1
2
J
B
13
11
C
7
8
I
14
F
9
6
4
3
D
5
E
12
6-8. SCHEMATIC DIAGRAM – MAIN Section (1/11) –
•
See page 71 for Waveforms.
•
See page 74 for IC Block Diagrams.
•
See page 82 for IC Pin Function Description.
w w w . x i a o y u 1 6 3 . c o m
Q Q 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299