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HCD-SHAKE7
59
IC656 TAS3108DCPR (MOTHERBOARD BOARD (1/10))
IC661 SN74LV4052APWR (MOTHERBOARD BOARD (1/10))
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2Y0
1Y2
VCC
1Y1
1-COM
1Y0
1Y3
A
B
GND
GND
INH
2Y1
2Y3
2-COM
2Y2
MCLK
Input
SAP
Audio DSP Core
Output
SAP
Microprocessor
and
I
2
C Bus Controller
PLL and Clock Management
M
U
X
M
U
X
M
U
X
M
U
X
M
U
X
M
U
X
÷4
Master
SCL
Oversample Clock
N = 0 (Default)
M = 8 (Default)
I
2
C
Master/Slave
Controller
8-Bit
WARP
8051 Microprocessor
OSC
÷2
÷2
÷2
÷2
÷ Z = 2
DEFAULT
÷ X = 1
DEFAULT
÷ Y = 64
DEFAULT
÷10
1/(M+1)
1/2
N
M
U
X
PLL
X 11
20
SCLKIN
19
LRCK
3
XTALI
2
VR_PLL
1
AVSS
4
XTALO
5
MCLKI
6
MCRCK_DV
7
CS0
8
GPIO
9
DVDD
10
DVSS
11
SDIN1
12
SDIN2
13
SDIN3
14
SDIN4
15
SDA1
16
SCL1
17
SDA2
18
SCL2
21
MCLKO
36
PLL2
37
RSRV
38
AVDD
39
GND
35
PLL1
34
PLL0
22
SCLKOUT1
23
SCLKOUT2
24
SDOUT4
25
SDOUT3
26
SDOUT2
27
SDOUT1
28
VR_DIG
29
DVSS
30
DVDD
31
PDN
32
RESET
33
RSRV
Summary of Contents for HCD-SHAKE7
Page 91: ...MEMO HCD SHAKE7 91 ...