Sony HCD-S400, Service Manual

Page: 53 / 74

53
HCD-S400
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18 to 25
26
27
28
29
30
31
32 to 34
35
36
37
38 to 41
42
43, 44
45
46, 47
48
49
50
51, 52
53
54
55, 56
57
58
59
60
61
62
63
64
65
66
I/O
–
I
I
I
–
O
O
O
I
I
I
–
O
O
O
O
–
O
I
I
–
O
I
I
I
–
O
O
O
–
O
–
O
O
–
O
I
O
–
O
I
–
I
O
I
O
O
O
O
O
Pin Name
VSCA0
XMSLAT
MSCK
MSDATI
VDCA0
MSDATO
MSREADY
XMSDOE
XRST
SMUTE
MCKI
VSIOA0
EXCKO1
EXCKO2
LRCK
F75HZ
VDIOA0
MNT0 to 7
TCK
TDI
VSCA1
TDO
TMS
TRST
TEST1 to 3
VDCA1
UBIT
XBIT
SUPDT0 to 3
VSIOA1
SUPDT4 , 5
VDIOA1
SUPDT6 , 7
SUPEN
VSCA2
NC
TEST4 , 5
NC
VDCA2
NC
BCKASL
VXDSD0
BCKAI
BCKAO
PHREFI
PHREFO
ZDFL
DSAL
ZDFR
DSAR
Description
Ground
Latch signal input for MB9130APFV
Shift clock input for MB9130APFV
Data input for MB9130APFV
Power supply
Data output for MB9130APFV
Output ready flag output for MB9130APFV
Not used (Open)
Reset signal input
Soft mute signal input (H:soft mute, L:off)
Master clock input (768Fs 33.8688MHz)
Ground
External clock output
Not used (Open)
Not used (Open)
Not used (Open)
Power supply for (+3.3V)
Not used (Open)
Test clock input
Test data input
Ground
Test data output
Test MS input
Test reset input
Test input (connected to ground)
Power supply (+2.5V)
Not used (Open)
Not used (Open)
Not used (Open)
Ground
Not used (Open)
Power supply (+3.3V)
Not used (Open)
Not used (Open)
Ground
Not used (Open)
Test input (Pull-down)
Not used (Open)
Power supply (+2.5V)
Not used (Open)
Bit clock I/O selection signal input for DSD data output (L:slave, H:master)
Not used (Open)
Not used (Open)
Bit clock output for DSD data output
Not used (Open)
Not used (Open)
Not used (Open)
Lch DSD data output
Not used (Open)
Rch DSD data output
• IC801 CXD2752R (PLAYBACK SIGNAL PROCESSOR) (DVD BOARD)