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24
HCD-RG555
Pin No.
Pin Name
I/O
Pin Description
102
DATA
I
Serial data signal input
103
VSS
—
Internal digital ground pin
104
XLAT
I
Latch signal input The serial data is latched at the falling edge
105
CLOCK
I
Serial data transfer clock signal input
106
VDD
—
Internal digital power supply pin (+3.3 V)
107
SENS
O
SENS signal output
108
SCLK
I
SENS serial data readout clock signal input
109
ATSK
I/O
Anti-shock signal input/output Not used in this set. (Open)
110
WFCK
O
WFCK signal output Not used in this set. (Open)
111
XUGF
O
XUGF signal output Not used in this set. (Open)
112
XPCK
O
XPCK signal output Not used in this set. (Open)
113
GFS
O
GFS signal output Not used in this set. (Open)
114
C2PO
O
C2PO signal output Not used in this set. (Open)
115
SCOR
O
High output when the subcode sync, S0 or S1, is detected
116
VDD
—
Internal digital power supply pin (+3.3 V)
117
C4M
O
4.2336MHz signal output Not used in this set. (Open)
118
WDCK
O
Word clock signal output f=2Fs Not used in this set. (Open)
119
COUT
I/O
Track number count signal input/output Not used in this set. (Open)
120
NC
—
Not used. (Open)