58
58
HCD-DZ230/DZ231/HDZ235
HCD-DZ230/DZ231/HDZ235
•
IC Block Diagrams
– MAIN Board –
39
HPOUTR2
41
HPOUTR1
43
43
HPOUTL2
45
HPOUTL1
44
HPVSSL
40
HPVSSR
46
HPVDDL
42
HPVDDR
47
XVDD
4
OUTR2-
5
VDDR
7
VSSR
8
VSSL
1
XVSS
2
XSUBC
3
VSSR
6
OUTR1+
9
10
OUTL2-
VDDL
12
VSSL
11
OUTL1+
48
14
XFSOOUT
XFSOIN
37
FSOCKO
38
FSOI
28
MCKSEL
26
SFLAG
36
XFSIIN
35
DVDD
24
25
31
OVF FLAG L
DATA
30
BCK
29
LRCK
34
TEST
33
BFVSS
32
BFVDD
27
INIT
18
NSPMUTE
17
DXSS
16
DVDD
15
XDVDD
19
SOFTMUTE
20
PGMUTE
21
SCDT
22
SCSHIFT
23
SSCLA
TCH
OVF FLAG R
S
P
DF1
DF2
Simpling Rate
Converter
Filter1
&
LOW
CUT
Filter
Gain
Control
Liner
Interpolator
PWM
Clock
Generator
Clock
Generator
(Tow dementional System)
(Primary System)
INT/MUTE
Serial
Control
IC3010, IC3020, IC3030 CXD9843AR
OUT1
IN 1-
FI N
(GND)
FI N
(GND)
IN2 +
IN 2-
OUT2
R ES1
REGCTL
IN 3+
IN3 -
OUT3
IN 4+
FI N
(GND)
IN
4
-
OUT
4
CT
L
FW
D
RE
V
MU
T
E
1
2
3
MU
T
E
4
TS
D_M
PV
CC2
DO5-
DO5+
P G ND2
DO4-
DO4+
DO3-
DO3+
REGO2
REGO1
P GND1
DO2-
DO2+
DO1-
FI N
(GND)
DO1+
PV
CC1
RE
GV
CC
OP
OUT2
OP
IN
2-
OP
IN
2+
VR
EF
SVC
C
OP
OUT1
OP
IN
1-
OP
IN
1+
IN
1
+
SG
N
D
D
D
REGVCC
RES2
REGVCC
REGVCC
REGVCC
PS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
MUTE123 MUTE4
PS
TSD_M
S
W
M
S
C
+
-
TSD
REGVCC
SELECT
11
6
ST
11
7
A
1
2
3
A
B
Y
5
Y
B
GND 4
VCC
8
Y
EN G
Y
IC3003 TC7WH157FK (TE85R)
IC1201 FAN8036L