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46
46
HCD-CPX11
0.9
±
0.4 Vp-p
1.9 Vp-p
59.1 ns
8
IC101
ra
(RFACO)
(CD play mode)
1 µs/DIV 200 mV/DIV
• Waveforms
– BD81A Board –
9
IC101
uj
(XTAO)
40 ns/DIV 1 V/DIV
12.4 Vp-p
12.2
µ
s
7
Q642, 643 (Collector)
(REC mode)
10 µs/DIV 5 V/DIV
– TC Board –
3.1 Vp-p
30.5
µ
s
2.7 Vp-p
62.5 ns
1
IC300
qa
(XCOUT)
20 µs/DIV 1 V/DIV
– MAIN Board –
2
IC300
qd
(XOUT)
40 ns/DIV 1 V/DIV
5 Vp-p
20.7
µ
s
4.2 Vp-p
326 ns
3 Vp-p
81.3 ns
3
IC603
q;
(LRCK)
10 µs/DIV 2 V/DIV
– S-MASTER AMP Board –
4
IC603
qa
(BCK)
100 ns/DIV 2 V/DIV
5
IC604
6
(3A)
40 ns/DIV 1 V/DIV
3.6 Vp-p
27.3
µ
s
6
IC801
ts
(OSC2)
20 µs/DIV 2 V/DIV
– LCD Board –
•
IC BLOCK DIAGRAMS
– BD81A Board –
IC301
TC94A34FG-002
33
34
35
36
37
38
39
40
41
42
1
8
43
61
62
63
64
60
59
56
52
50
47
46
45
44
48
49
25
26
27
28
29
30
31
32
17
18
19
20
21
22
23
24
9
10
11
2
3
4
5
6
7
58
57
55
53
51
12
13
14
15
16
54
RAS
CAS
OE
WE
PIO7
PIO6
PIO5
PIO4
Bus
Switch
BUCK
CCE
AD12
AD11
Gener
al
In/Output P
or
t
Address Calc.
2sets
Y-
P
o
in
ter
register
C-P
ointer
register
X-P
ointer
register
VDDM
SRMSTB
VDDT
AD10
AD9
ERAM
2k w
ord
CRAM
4k w
ord
CR
OM
4k w
ord
YRAM
4k w
ord
XRAM
4k w
ord
SRAM/
DRAM I/F
SRAM I/F
1Mbit
SRAM
X-Bus
Y-
Bus
AD7
AD6
AD5
AD8
VC0
Timing
Generator
PRAM
Instr
uction
Decoder
Prog
ram
Control
MCU
. I/F
register
XO • X1 • X2
Y0 •
Y1 •
Y2
MX
MY
MZ
MA
C
A0
A1
AX
A
Y
ALU
A2
A3
DIT
round & limit
round & limit
Au
d
io I/F
LRCKIA
BCKIA
SDI0
LRCKO
BCKO
SDO0
VSS
VDDT
MIACK
MICK
MIDIO
MILP
MICS
STANBY
RESET
VDDP
AD4
AD3
AD2
AD1
AD0
VSS
VDD
CK
O
VDDX
XO
TEST
VCOI
VSSX
XI
MIMD
VSSP
PIO3
PIO2
PIO1
PIO0
VSS
CKI
VDD
TXO
SFSY
SBSY
D
ATA
POM
Sub code
I/F
CDP Cont
I/F
Summary of Contents for HCD-CPX11
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