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46
46
HCD-C5
6-2. BLOCK DIAGRAM – CD SERVO SECTION –
• Signal Path
: CD (DIGITAL)
:DIGITAL IN (OPTICAL)
OPTICAL PICK-UP
BLOCK
OPTIMA-720L1E
VA
9
VB
VE
VF
LD
1/2VCC
VCC
+5V
GND
MD
VR
LD
DRIVE
Q101
RF AMP
DIGITAL
OPTICAL
IN
IC103
VC
27
VFC
25
B
7
A
6
C
8
D
9
E
10
F
11
LD
1
PD
2
VC
IC102
MOTOR/COIL DRIVER
VO1(+)
14
VO1(-)
13
12
11
15
16
M
M
FEED
MOTOR
18
17
M
SPINDLE
MOTOR
F+
FOCUS
COIL
TRACKING
COIL
F-
TR+
TR-
2
OPIN1(+)
3
OPIN1(-)
5
6
27
26
23
MDP
25
SRDR
30
SFDR
29
TRDR
32
TFDR
31
FRDR
34
FFDR
33
DIGITAL SIGNAL PROCESSOR
IC101
DIGITAL SERVO,
64
D OUT
RFAC
50
28
RFDCO
15
26
RFAC
16
FE
18
TE
12
SW
17
FEI
29
RFDCI
RFDC
43
FE
39
TE
41
SE
VCC
RV101
40
4
DATA
DATA
6
CLOK
CLK
5
XLAT
XLT
76
SQSO
SQSO
7
SENS
SENS
26 SSTP
19 TE_BAL
2
XRST
69
XTSL
MASTER CONTROL
IC501(1/2)
CXD-DATA
7
8
SCLK
77
SQCK
SCLK
15
SCOR
SCOR
71
XTAI
72
XTAO
CXD-CLK
8
CXD-XLT
11
SUBQ
15
SENSE
14
SCLK
17
SCOR
95
CTRL1
CTRL1(1-2)
18
LDON
LDON
13
BDRST
XRST
29
27
26
7
9
4
2
PWM1
PWM1
12
PWM2
PWM2
19
PWM3
PWM3
20
VO2(+)
VO2(-)
VO4(+)
VO4(-)
VO3(-)
VO3(+)
OPIN2(+)
OPIN(2-)
OPIN4(+)
OPIN4(-)
OPIN3(-)
A
MD
SERVO
SECTION
(Page 47)
RFC
SWITCH
Q102
IC221
+3.3V
REG
Q103,D101
SELECTOR
5
4
6
9
10
8
13
11
12
X201
33.8688MHz
S5
LIMIT
IN
SWITCH
+5V
+5V
+3.3V
DIN, OPTO
3
1
2
8
4
6
2
3
7
10
5
1
SD+
SD-
SP+
SP-
IC222
OPTO
SW1
30
SW2
31
SW3
32
SW4
S1 (Disc IN/8cm Disc Detect)
S2 (12cm Disc/12cm Disc Eject End Detect)
S3 (Disc Existence, Chacking, Releasing Detect)
S4 (8cm Disc Eject End Detect)
33
IC1102
LOADING MOTOR DRIVER
RIN
FIN
OUT1
OUT2
LODPOS
LODNEG
M902
(LOADING)
M903
M904
DIGITAL
OPTICAL
INPUT