DSC-H2_L3
4-33
4-34
SY-150 (6/8)
9.4
8.5
2.0
1.3
2.6
5.0
2.6
2.6
2.6
2.6
0
3.2
3.2
1.5
2.9
3.2
P1.1
R3.2
:Voltage measurement of the CSP IC
and the Transistors with mark,is
not possible.
CSP(CHIP SIZE PACKAGE)IC
NO MARK:REC/PB MODE
R :REC MODE
P :PB MODE
0.7
0.9
1.3
1.3
1.3
1.3
1.3
1.4
0.7
0.9
1.3
1.3
1.3
1.3
1.3
1.2
0
2.9
1.3
1.3
0
0
1.4
1.3
0.1u
C535
XSAN_RST_OUT
D_3.2V
10V
0.1u
B
C527
0.1u
C536
TPS61027DRCR
IC501
1
EN
2
VOUT
3
FB
4
LBO
5
GND
6
VBAT
7
LBI
8
PS
9
SW
10
P_GND
11
P_GND
10V
33u
C502
SAN0_SI
REG_GND
B
0.0022u
C514
R2J30500LG
IC504
C1
VM5_0
C10
VM5_1
A1
PGND
E1
PGND
A10
PGND
E10
PGND
F1
DVCC
F10
DGND
D1
OUT0A
B1
OUT0B
D10
OUT1A
B10
OUT1B
E2
MD_IN0
F2
MD_BR0
G2
MD_EN0
E9
MD_IN1
F9
MD_BR1
G9
MD_EN1
G7
xMD_PS
K1
VCCA3
K6
VCCA3
K7
GNDA3
K10
GNDA3
H2
OP_IP0
J1
OP_OUT0
H1
OP_IN0
K2
DA0
J2
IA0
K3
IB0
J3
OP_OUT2
J4
OP_IN2
J9
OP_IP1
J10
OP_OUT1
H9
OP_IN1
K9
DA1
J8
IA1
K8
IB1
K4
CH0
G5
CH1
K5
CH2
J5
CH3
J6
VB
D4
PWM2
D7
PWM3
F7
UDIDEBUG
E7
UDITRST
G1
UDITCK
F4
UTITMS
G10
UDITDO
E4
UDITDI
C9
VD
B9
PIO3
B8
PIO2
B7
PIO1
A5
XSCS
B4
SO
A4
SI
A3
CLK
A7
RESET_N
A2
VCCD3
A9
VCCD3
A8
GNDD3
D2
VCCD15
D9
VCCD15
H10
GNDD15
B3
TEST1
B2
TEST2
C2
TEST3
E5
MARK
D5
CPU_PIO_0
D6
CPU_PIO_1
G4
TEST
G6
OP_OUT3
J7
OP_IN3
B6
PIO0
A6
XDL
B5
SCK
XX
R508
B
0.001u
C518
8200
R521
27k
R511
0.1u
B
C511
10k
R526
10k
R538
B
0.01u
C517
39k
R509
10V
22u
C510
SAN0_SO
B
1u
C508
3300
R512
6.3V
2.2u
C503
10k
R524
XX
R514
JL505
0.047u
B
C530
XBONOBO_CPU_RESET
0.047u
B
C533
B
0.0022u
C519
1u
C515
SAN_27M_CLKO
B
0.001u
C513
B
1u
10V
C505
10u
B
C501
C521
XX
B
6.3V
22u
C529
10k
R537
A_3.2V
0.047u
B
C532
XX
C509
0.1u
C534
CA_FD
M_5V_ON
XX
C516
27k
R519
XX
R516
8200
R513
B
6.3V
22u
C528
B
0.01u
C522
39k
R517
C524
XX
0.047u
B
C531
1M
R536
3300
R520
REG_GND
XSAN0_SCK
10k
R515
XCS_BONOBO
1M
R535
XX
R522
ST_UNREG
0.1u
C512
0.1u
C537
XX
C520
0
R527
14P
CN501
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SE501
4
12
3
22k
R539
22k
R540
22k
R541
22k
R542
0.01u
B
C538
4.7uH
L503
R1114Q291D-TR-FA
IC503
1
CE
2
VSS
3
VOUT
4
VIN
R1114Q151D-TR-FA
IC505
1
CE
2
VSS
3
VOUT
4
VIN
SE502
4
1
2
3
100k
R543
100k
R549
100k
R548
100k
R547
100k
R546
100k
R545
100k
R544
NJM3230V(TE2)
IC506
1
P
ASS
2
OUT1
3
AM1
4
V
ref1
5
HO1
6
HI1
7
LO1
8
LIA1
9
LIB1
10
GND
11
LIB2
12
LIA2
13
LO2
14
HI2
15
HO2
16
V
ref2
17
AM2
18
OUT2
19
C_RESET
20
VCC
XX
C539
XX
C540
CL501
CL502
EMH2-T2R
BUFFER
Q503
6
2
1
3
5
4
MA2SD32008S0
D501
TK70685HCL-G
IC507
1
Vcont
2
GND
3
Np
4
Vout
5
GND
6
Vin
B
10V
1u
C544
100k
R553
10V
0.1u
B
C543
6.3V
2.2u
B
C541
MA2SD32008S0
D502
PANEL_8.5V_ON
PANEL_8.5V
B
1u
6.3V
C542
UNR31A300LS0
Q504
1
2
3
470k
R555
10V
0.33u
B
C545
15k
R557
10V
0.33u
B
C546
15k
R558
ST_5V
XKEY_BONO
1
A
CA_FD
PITCH_H
SAN0_SO
XSAN0_SCK
SAN_27M_CLKO
SAN_27M_CLKO
YAW-
CA_FD
PITCH+
XSAN0_SCK
YAW+
Y
A
W_HALL-
PITCH_HALL-
PITCH_HALLBAIS-
SAN0_SO
SAN0_SI
PITCH-
SAN0_SI
XCS_BONOBO
Y
A
W_HALLBAIS-
Y
A
W_H
XSAN_RST_OUT
XSAN_RST_OUT
PITCH+
YAW+
YAW-
PIT
PITCH_HALL-
PITCH_H
PITCH_HALLBAIS-
Y
YAW_HALL-
YAW_H
YAW_HALLBAIS-
PITCH-
XBONOBO_CPU_RESET
Y
A
PIT
XCS_BONOBO
XBONOBO_CPU_RESET
GND
Vcc
V ref
OUT
GND
Vcc
V
ref
OUT
PITCH+
PITCH-
YAW+
YAW-
PIT
PITCH_HALL-
PITCH_H
PITCH_HALLBAIS-
Y
YAW_HALL-
YAW_H
YAW_HALLBAIS-
REG_GND
NC
SWITCH
IC507
8.5V REG
DC/DC CONV.
IC501
1.5V REG
IC505
IC504
STEADY SHOT CONTROL
2.9V REG
IC503
PITCH/YAW SENSOR
AMP
IC506
LENS
UNIT
(2/2)
(YAW SENSOR)
(PITCH SENSOR)
@15
(7/8)
(8/8)
@16
(8/8)
(3/8)
@09
(2/8,3/8,
4/8,7/8)
@05
(2/8,3/8)
@06
@07
(3/8,8/8)
(3/8,4/8)
@10
SY-150 BOARD(6/8)
STEADY SHOT CONTROL
XX MARK:NO MOUNT
I
3
H
15
10
7
F
13
C
5
G
D
B
E
9
14
11
12
16
6
8
4
17
2
LENS UNIT is replaced as a block.
So that this PRINTED WIRING BOARD and
SCHEMATIC DIAGRAM are omitted.
