—
40
—
SA
T-W
60
+ 3 _ 3 V
6 0 3
5 %
4.7K
R 1 2 2 5
6 0 3
5 %
4.7K
R 1 2 2 4
6 0 3
5 %
4.7K
R 1 2 2 3
6 0 3
5 %
4.7K
R1201
+ 3 _ 3 V
6 0 3
TK
1/16W
5 %
4.7K
R 1 2 2 2
6 0 3
5 %
4.7K
R 1 2 0 2
6 0 3
5 %
4.7K
R 1 2 0 3
6 0 3
5 %
4.7K
R 1 2 0 4
6 0 3
5 %
4.7K
R1213
6 0 3
5 %
4.7K
R 1 2 0 6
6 0 3
5 %
4.7K
R 1 2 0 7
6 0 3
TK
1/16W
5 %
4.7K
R 1 2 0 8
6 0 3
TK
1/16W
5 %
4.7K
R1210
6 0 3
TK
1/16W
5 %
4.7K
R 1 2 0 9
6 0 3
5 %
4.7K
R1211
6 0 3
5 %
4.7K
R1214
6 0 3
5 %
4.7K
R1215
6 0 3
5 %
4.7K
R1217
6 0 3
5 %
4.7K
R1216
6 0 3
5 %
4.7K
R1218
6 0 3
5 %
4.7K
R 1 2 2 0
6 0 3
5 %
4.7K
R1219
6 0 3
5 %
4.7K
R1221
6 0 3
5 %
4.7K
R1212
6 0 3
5 %
4.7K
R 1 2 0 0
6 0 3
TK
1/16W
5 %
4.7K
R 1 2 0 5
C WEBTV NETWORKS, INC. 1999
representative of a named recipient.
or otherwise use this document unless you are an authorized
than the recipient is not authorized. You may not read, copy,
information. Disclosure of this information to anyone other
This document contains privileged or otherwise legally protected
APPROVED:
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DATE:
1
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3 7
2 6
PVT
E L M E R
CONFIG
SLEATOR/FULLER
0.0
D R A W I N G
LAST_MODIFIED=Mon Jun 19 13:05:49 2000
(DVT-2.3)
P R E S E N T
C P U B U S M A S T E R
<7..6> RESERVED
LO-ROMS ARE BYTE (8 BIT) WIDTH
HI-ROMS ARE WORD (16 BIT) WIDTH
LO-HARD DISK PRESENT
HI-NO HARD DISK
L O - E N A B L E S N T S C M O D E
HI-ENABLED PAL MODE
L O - E N H A N C E D M O D E D I S A B L E D
H I - E N H A N C E D M O D E E N A B L E D
LO-PIPELINE CLOCK = 3X BUS CLOCK.
HI-PIPELINE CLOCK = 2X BUS CLOCK.
L O - C O N N E C T E D B E T W E E N 2 A N D 3 ( P U L L E D D O W N ) = C A S L A T E N C Y 3
HI-CONNECTED BETWEEN 1 AND 2 (PULLED UP) = CAS LATENCY 2
LO-SYSTEM RUNS IN LITTLE ENDIAN MODE.
HI-SYSTEM RUNS IN BIG ENDIAN MODE.
LO-WHEN USING A QED 5230 CPU.
HI-WHEN USING AN IDT 4640 CPU.
LO-DISABLES SMART CARD PORT #0.
HI-ENABLES SMART CARD PORT #0.
HI-ENABLES SMART CARD PORT #1.
LO-DISABLES SMART CARD PORT #1.
LO-USE INT CLOCK MULTIPLIERS (2X/3X)
HI-USE 1/2 CLOCK MULTIPLIERS (2.5X/3.5X)
5 = ...
6 = L C 3 - S A T
4 = ...
3 = L C 3 - D E V 2 ( S O L O 2 )
<2> 0 = DISK; 1 = FLASH
<3> 0 = NTSC; 1 = PAL
<11..8> BOARD REVISION
<14..12> BOARD TYPE
Software Bits:
R1216, R1215
UP , UP OUTPUT DRIVERS AT 83%
UP , DOWN OUTPUT DRIVERS AT 100%
DOWN, UP OUTPUT DRIVERS AT 50%
DOWN, DOWN OUTPUT DRIVERS AT 67%
RIO_ADDR[16:15] - CPU OUTPUT DRIVER SLEW RATE.
2 = 5230-J (SOLO)
1 = LC3-DEV (SOLO)
0 = LC2 (SOLO)
B O A R D T Y P E
R1200
RIO_ADDR[0] - ROMS ARE WORD/BYTE WIDTH
R1202
RIO_ADDR[2] - HARD DISK PRESENT
R1203
RIO_ADDR[3] - VIDEO MODE
R1204
RIO_ADDR[4] - ENHANCED CPU INTERFACE ENABLED (USE WITH EXTERNAL BRIDGE CHIPS)
RIO_ADDR[19] - ENDIANESS.
RIO_ADDR[17] - CPU PIPELINE CLOCK SPEED.
R1217
R1218
R1219
R1223
RIO_ADDR[23] - USE 1/2 CLOCK MULTIPLIERS FOR CPU
R1222
R1221
R1220
RIO_ADDR[20] - CPU TYPE.
RIO_ADDR[21] - SMART CARD #0 ENABLE.
RIO_ADDR[22] - SMART CARD #1 ENABLE.
BOARD REV.
5 2 3 0
4 6 4 0
C P U C O N F I G
UART CONFIG
0
1
S M A R T
S M A R T
SERIAL
SERIAL
RIO_ADDR[18] - SDRAM SPEED.
6
(LC3-SAT)
R E S E R V E D
VIDEO INVERSION
R1205 - LOW IS INVERTED
R1205 - HIGH IS NORMAL
S M C
U A R T
6
CONFIG_BITS<25..0>\I
TITLE=BLK_CFG
A B B R E V = B C F G
19
18
2
1
3
2
3
1
3
1
2
3
1
2
1
2
3
2
1
3
1
2
3
2
1
3
2
1
3
1
2
3
2
1
3
1
2
3
3
1
2
3
1
2
3
1
2
1
2
3
1
2
3
1
2
3
2
1
3
1
2
3
1
2
3
3
2
1
2
1
3
0
20
1
3
2
1
1
2
3
1
2
3
23
24
25
3
2
21
4
5
6
7
8
22
9
10
11
12
13
14
15
16
17
Summary of Contents for DIRECTV RECEIVER SAT-W60
Page 52: ... 52 SAT W60 POWER SUPPLY ...
Page 59: ...SAT W60 ...
