19
D-EJ1000
Pin No.
1
2
3
4
5
6
7
8
9
10
11 to 13
14
15 to 17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
I/O
O
O
I/O
I/O
I/O
I/O
O
O
O
O
O
—
O
I/O
—
I
I
O
I
I
I
O
O
I
I
I/O
I/O
O
—
I
I
O
O
O
O
I
I
—
O
O
—
—
I
O
—
—
O
O
—
—
Pin Name
XRAS
XWE
D1
D0
D3
D2
DCLK
DCKE
XCAS
WFCK
A9 - A7
DVSS
A6 - A4
XRDE
VDD0
CLOK
SDTO
SENS
XLAT
XSOE
SYSM
WDCK
SCOR
XRST
PWMI
XQOK
XWRE
R4M
VSS0
SQCK
SCLK
SQSO
XEMP
XWIH
SBSO
EXCK
XTSL
HVSS
HPL
HPR
HVDD
XVDD
XTAI
XTAO
XVSS
AVDD1
AOUT1
VREFL
AVSS1
AVSS2
Description
DRAM row address strobe signal output
DRAM data input enable signal output
DRAM data bus 1
DRAM data bus 0
DRAM data bus 3
DRAM data bus 2
Test pin Not used (open)
Test pin Not used (open)
DRAM column address strobe signal output
WFCK signal output Not used (open)
DRAM address bus 9 - 7
Ground (DRAM interface )
DRAM address bus 6 - 4
DRAM readout enable signal input Not used (open)
Power supply (digital)
Serial data transfer clock input from CPU
Serial data input from CPU
SENS signal output to CPU
Latch signal input from CPU
CPU serial data output enable signal input
Mute signal input ( “ H “: mute)
Word clock output (f=2Fs)
Output a high signal when either subcode sync S0 or S1 is detected
System reset ( “ L “ : reset)
Spindle motor external control input Not used (open)
Subcode-Q OK signal input Not used (open)
DRAM write enable signal input Not used (open)
Clock output for Microcomputer
Ground (digital)
SQSO readout clock input (fixed at “H”)
SENS serial data readout clock input (fixed at “H”)
Subcode-Q 80-bit or PCM peak and level data output Not used (open)
DRAM readout prohibited signal output Not used (open)
DRAM write prohibited signal output Not used (open)
Subcode P to W signal output Not used (open)
SBSO readout clock input Not used (connected to ground)
Crystal selection input ( “L” : 16.9344MHz, “H” : 33.8688MHz) fixed at “L”
Ground (headphone)
PDM output for L-Ch headphone
PDM output for R-Ch headphone
Power supply (headphone)
Power supply (master clock)
Crystal oscillation circuit input
Crystal oscillation circuit output
Ground (master clock)
Power supply (analog)
L-Ch analog output
L-Ch reference voltage output
Ground (analog)
Ground (analog)
• IC601 CXD3029R ( RF AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR )
