5
5
CDX-T67
C510
C413
R410
R408
C412
C411
R406
C416
R405
R412
C407
R402
R403
C408
R404
C410
C403
R414
C414
C501
R503
C502
R504
C503
C504
R505
R506
R502
R501
R508
C511
C516
C508
R510
C513
C505
C506
C509
R521
C515
R509
C405
C404
C401
TP401
TP402
TP403
TP404
TP408
TP407
TP406
TP405
C402
C306
CN202
X401
C514
IC501
Q503
Q501
R515
R518
R513
R514
R517
R520
R519
R507
C512
R512
R511
R306
C415
IC401
R401
R407
Q502
47
4V
220p
100k
33k
0.47
0.01
100k
0.01
10k
33k
0.047
3.3k
10k
1500p
1M
220p
2200p
1k
0.1
150p
10k
150p
10k
0.001
0.001
10k
10k
10k
10k
470
10
16V
0.01
47
4V
100k
100p
100p
100p
47
4V
10k
47
4V
100k
220
16V
220
16V
0.1
0.01
0.1
22P
16.9344M
Hz
100p
TLV2362IPW
UN2226
DTA115EKA-T146
10k
12k
6.8k
12k
6.8k
12k
6.8k
470
10
16V
6.8k
12k
10
220p
CXD3017Q
3.3k
33k
UN2226
1
2
3
4
5
6
7
8
9
10
11
12
FOK
MDP
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
EMPH
FRDR
FFDR
TFDR
TRDR
MDP
SRDR
SFDR
SCOR
GFS
SCLK
SENS
CLOK
XLAT
DATA
XRST
SQSO
SQCK
SAVE_SW
LIM_SW
LOADR
LOADF
LIM_SW
SQSO
SQCK
XRST
SYSM
DATA
CLOK
SENS
SCLK
XLAT
VDD
ATSK
SPOA
SPOB
XLON
WFCK
XUGF
XPCK
GFS
C2PO
SCOR
COUT
M
IR
R
D
FC
T
FO
K
L
O
CK
M
D
P
S
ST
P
S
FD
R
S
R
D
R
TFD
R
F
FD
R
FR
D
R
V
S
S
T
ES
T
T
ES
1
X
TS
L
V
C
FE
S
E
TE
CE
RFDC
ADIO
AVSS0
IGEN
AVDD0
ASYO
ASYI
BIAS
RFAC
AVSS3
CLTV
FILO
FILI
PCO
AVDD3
VSS
VDD
DOUT
LRCK
PC
M
D
BC
K
EM
PH
XV
D
D
X
T
AI
XT
A
O
XV
S
S
A
VD
D
1
A
O
U
T
1
AIN
1
LO
U
T1
A
VS
S1
A
VS
S
2
LO
U
T2
AIN
2
A
O
U
T
2
A
V
D
D
2
RM
U
T
LMUT
T
R
DR
8V
LIM_SW
TE
FE
VC
5V
SAVE_SW
FRDR
FFDR
TRDR
TFDR
SRDR
SFDR
MDP
GND(8V)
GND(5V)
DVCC(3V)
R/RW_SEL
RFAC
RFDC
LOADR
LOADF
(CHASSIS)
VC
C
G
N
D
GROUND-ISOLATION
MUTING
MUTING
SWITCH
MUTING CONTROL
DIGITAL SIGNAL PROCESSOR,
DIGITAL SERVO PROCESSOR,
DIGITAL FILTER,D/A CONVERTER
FLEXIBLE
BOARD
MAIN
SCHEMATIC DIAGRAM – MAIN Board (2/2) –
(Page 4)
Summary of Contents for CDX-T69
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