Sony CDX-MP40 Installation/Connection, Service Manual

Page: 36 / 66

36 36
CDX-MP40
76
75
AGCI
AGCO
74
RFI
73
C3T
72
ASY
71
EFM
70
AVDD
69
7E DAC3
68
7D DAC2
67
7C DAC1
66
7F DAC0
65
MD
64
SD
63
TD
62
FD
60
ATEST
59
TEST1
58
TEST0
57
DGND
56
TSTB
55
TSCK
54
TSI
53
TSO
52
PACK
51
DVDD
61
AGND
1
DGND
2
RFOK
3
RST
4
A0
5
STB
6
SCK
7
SO
8
SI
9
XTALEN
10
DVDD
11
DAVDD
12
ROUT
13
DAGND
REGC
16
LOUT
17
DAVDD
18
R+
19
R–
20
L+
21
L–
22
XVDD
23
XTAL
24
XTAL
25
XGND
15 14
DAGND
77 RFO
78 EQ2
79 EQ1
80 RF-
81 AGND
82
A
83
C
84
B
85
D
86
F
87
E
88 AVDD
89 REFOUT
90 FE-
91 FEO
92 TE-
93 TEO
94 TE2
95
AGND
TEC
96
PD 97
98 LD
PN 99
100 AVDD
50 C2D3
49 C2D2
48 C2D1
47 C1D2
46 C1D1
45 DGND
44 PLCK
43 MIRR/WFCK
42 RFCK
41 LOCK
40 DVDD
39 TSOI
38 C16M
37 DGND
36 TX
35 HOLD/WDCK
34 LRCK
33 LRCKIN
32 SCKO
31 SCKIN
30 DOUT
29
28
DIN
FLAG
27 EMPH
26 DVDD
EFM
COMPARATOR
EFM
EFM
DEFECT
FOK
A3T
MIRR
FEO
TEO
TEOFS
FEOFS
RF
AMP BLOCK
SWITCH
MICROCOMPUTER INTERFACE
SCF
OSC
FOCUS
REGISTER
TRACKING
REGISTER
OCTUPLED
OVERSAMPLING DIGITAL FILTER
NOISE SHAVER
OUTPUT BUFFER
NOISE SHAVER
OUTPUT BUFFER
DE-EMPHASIS CIRCUIT
D/A
INTERFACE
CIRCUIT
OUTPUT PROCESSOR
DIGITAL
AUDIO
INTERFACE
DIGITAL PLL
TIMING GENERATOR
EFM DEMODULATOR
ERROR
CORRECTION
PROCESSOR
MICROCOMPUTER INTERFACE
CD-TEXT DECODER
SUB-CODE PROCESSOR
16K
SRAM
D/A
AUTO GAIN
CONTROLLER
FD/TD/SD/MD
CONTROLLER
ADDER
SVDRAM
MULTIPLIER
SVCRAM
SVROM
ROM
DECODER
CLV
PROCESSOR
DEFECT
COMPARATOR
RFENV
MIRENV
A/D CONVERTER
MEMORY
PROCESSOR
COMPARATOR
1 FWD
+
–
+ –
+
–
2 REV
LOADING PRE
FWD REV
3 LDCONT
6
IN2
7 PREVCC
8 POWVCC
VOL–
VOL+
IN1
4 PS
+ –
LEVEL
SHIFT
+
–
+
–
LEVEL
SHIFT
LEVEL
SHIFT
+
–
POWER
SAVE
CH1-4
MUTE
X3
9
10
11 VO2–
12 VO2+
13 VO1–
14 VO1+
5
BIAS
OPIN4+
OPIN4–
OPIN3–
OPOUT3
MUTE
POWVCC
GND
OPIN3+
OPOUT4
VO3–
VO3+
VO4–
VO4+
7.5k 7.5k
16k 16k
7.5k 7.5k
16k 16k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
+ –
+
–
+ –
LEVEL
SHIFT
+
–
+
–
+
–
10k
10k
10k
10k
+
–
28
27
26
23
22
21
25
20
19
18
17
16
15
24
POWVCC34
(CH3,CH4)
PREVCC
(PRE.LOADING)
POWVCC12
(CH1.CH2)
1
5
2
4
3
IN B
VCC
IN A
GND
OUT
RESET
SWITCH
BATT
SWITCH
1
2
3
4
5
6
7 8
9
10
14
13
12
11
BUSON
RST
BATT
CLK
VREF
DATA
I/O
GND
B/U-C
CLK-IN
BUSON
VCC
DATA IN
DATA OUT
RST
SCOUT
MRO
MPTH
TCON OSCO
OSCI
VSSD
VDDD
DAVN
SDA
VREF
MPX
VSSA VDDA AFIN MAD PSWN
SCL
2 1 6
15 11 13 16 14 12
INTERFACE
REGISTER
SIGNAL QUALITY
DECODER
CLOCKED
COMPARATOR
POWER SUPPLY
& RESET
TEST
CONTROL
OSCILLATOR
& CLOCK
PAUSE
DETECTOR MULTI
PATH
DETECTOR
57kHz
8th ORDER
BAND-PASS FILTER
RDS/RDBS
DECODER
RDS/RDBS
DEMODULATOR
IIC BUS SLAVE
TRANSCEIVER
17 18
CIN
19
LVIN
20
8 7
DATA
CLOCK
DATA
CLOCK
4
4
5
9 10 3 4 5
IC1 µPD63711GC-8EU
3-17. IC BLOCK DIAGRAMS
IC803 MM1175XFF
IC2 BA5810FP-E2
IC601 SAA6588T/V2-518
IC12 TC7SH08FU-TE85R