33
Pin No.
Pin Name
I/O
Pin Description
52
TE
I
Tracking error signal input
53
CE
I
Center servo analog input
54
RFDC
I
RF signal input
55
ADIO
O
Test pin (Not used.)
56
AVSSO
—
Analog ground
57
IGEN
I
Constant current input from OP amplifier.
58
AVDDO
—
Analog ground
59
ASYO
O
EFM full-swing output (“L”: VSS, “H”: VDD)
60
ASYI
I
Asymmetry comparate voltage input
61
RFAC
I
EFM signal input
62
AVSS3
—
Analog ground
63
CLTV
I
VCO control voltage input from master.
64
FILO
O
Filter output for master PLL. (slave=digital PLL)
65
FILI
I
Filter input from master PLL.
66
PCO
O
Charge pump output for master PLL.
67
AVDD3
—
Analog power supply pin
68
BIAS
I
Asymmetry circuit constant current input
69
VCTL
I
VCO2 control input from wideband EFM PLL.
70
V16M
O
VCO2 oscillator output for wideband EFM PLL. (Not used.)
71
VPCO
O
Charge pump output for wideband EFM PLL. (Not used.)
72
DVSS
—
Digital ground
73
MD2
I
Digital out ON/OFF control input (“L”: OFF, “H”: ON)
74
DOUT
O
Digital out output
75
ASYE
I
Asymmetry circuit ON/OFF input (“L”: OFF, “H”: ON)
76
DVDD
—
Digital power supply pin
77
LRCK
O
D/A interface LR clock output (f=Fs)
78
LRCKI
I
D/A interface LR clock input
79
PCMD
O
D/A interface serial data output (2’s COMP, MSB fast)
80
PCMD
I
D/A interface serial data input (2’s COMP, MSB fast)
81
BCK
O
D/A interface bit clock output
82
BCKI
I
D/A interface bit clock input
83
EMPH
O
Emphasis ON/OFF signal output
84
EMPHI
I
Emphasis ON/OFF signal input (“H”: ON, “L”: OFF)
85
XVDD
—
Power supply for master clock.
86
XTAI
I
X’tal oscillator input from master clock (16.9344 MHz).
87
XTAO
O
X’tal oscillator output for master clock (16.9344 MHz). (Not used.)
88
XVSS
—
Ground pin for master clock.
89
AVDD1
—
Analog power supply pin
90
AOUT1
O
Lch analog output (Not used.)
91
AIN1
I
Lch OP amplifier input (Not used.)
92
LOUT1
O
Lch LINE output (Not used.)
93
AVSS1
—
Analog ground
94
AVSS2
—
Analog ground
95
LOUT2
O
Rch LINE output (Not used.)
96
AIN2
I
Rch OP amplifier input (Not used.)
97
AOUT2
O
Rch analog output (Not used.)
98
AVDD2
—
Analog power supply pin
99
RMUT
O
Rch “0” detect Flug (Not used.)
100
LMUT
O
Lch “0” detect Flug (Not used.)
Summary of Contents for CDX-M700R
Page 4: ...4 SECTION 1 GENERAL This section is extracted from instruction manual CDX M700R CDX M750 ...
Page 5: ...5 Ver 1 2 2001 03 CDX M700R ...
Page 6: ...6 ...
Page 7: ...7 CDX M700R ...
Page 8: ...8 CDX M750 ...
Page 9: ...9 CDX M700R ...
Page 10: ...10 CDX M700R ...
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Page 13: ...13 ...
Page 14: ...14 CDX M750 ...
Page 15: ...15 CDX M700R ...
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Page 19: ...19 CDX M750 ...
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Page 28: ...28 2 13 OPTICAL PICK UP BLOCK 1 P 2x3 2 sled motor assy 3 optical pick up block ...
Page 46: ...46 46 4 6 PRINTED WIRING BOARDS CD MECHANISM SECTION CDX M700R M750 ...
Page 51: ...51 51 Page 47 Page 56 CDX M700R M750 ...
Page 56: ...56 56 4 14 PRINTED WIRING BOARD SUB SECTION Page 51 CDX M700R M750 ...
Page 59: ...59 59 4 17 SCHEMATIC DIAGRAM DISPLAY SECTION Page 55 CDX M700R M750 ...
Page 81: ...81 CDX M700R M750 MEMO ...