Sony CDX-C8850R, Service Manual

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SECTION 4
DIAGRAMS
• IC501 CXD2548R (DIGITAL SERVO, DIGITAL SIGNAL PROCESSOR) (SERVO BOARD)
Pin No. Pin Name I/O Pin Description
1 SYSM I System mute input (Not used.)
2 RMUT1 O R-ch, “0” detection output. (“H” : ON, “L” : OFF) (Not used.)
3 LMUT2 O L-ch, “0” detection output. (“H” : ON, “L” : OFF) (Not used.)
4 CKOUT O Master clock frequency division output (Not used.)
5 VDD0 — Digital power supply
6 SBSO O Serial output of sub-P to W.
7 EXCK I Clock input for SBSO read output.
8 SQCK I Clock input for SQSO read output.
9 SQSO O SubQ 80 bit, PCM peak and level data 16 bit output.
10 SENS O SENS output. Output to CPU.
11 SCLK I Clock input for SENS real data read.
12 DATA I Serial data input from CPU.
13 XLAT I Latch input from CPU. Latch serial data at the falling edge.
14 CLOK I Serial data transfer clock input from CPU.
15 XRST I System reset (“L” : Reset)
16 ACDT O Not used.
17 PWM1 I External control input of spindle motor.
18 XLON O Microcomputer extension interface (Output) (Not used.)
19 SPOA I Microcomputer extension interface (Input A) (Not used.)
20 WFCK O WFCK (Write Flame Clock) output
21 GTOP O GTOP output
22 XUGF O XUGF output (Not used.)
23 XPCK O XPLCK output (Not used.)
24 GFS O GFS output
25 RFCK O RFCK output
26 C2PO O C2PO output (Not used.)
27 XROF O XROF output
28 SCOR O “H” output at either detection, sub code sync S0 or S1.
29 MNT0 O MNT0 output (Not used.)
30 MNT1 O MNT1 output (Not used.)
31 MNT3 O MNT3 output (Not used.)
32 VSS1 — Digital GND
33 DOUT O Digital-Out output
34 ATSK I For anti-shock.
35 MIRR O Mirror signal output (Not used.)
36 DFCT O Diffect signal output (Not used.)
37 FOK O Focus OK signal output
38 VDD1 — Digital power supply
39 VPCO1 O Charge pump output for wideband EFM PLL.
40 VPCO2 O VCO2 charge pump output for wideband EFM PLL.
41 VCK.I I VCO2 oscillator input for wideband EFM PLL.
42 V16M O VCO2 oscillator output for wideband EFM PLL.
43 VCTL I VCO2 control input for wideband EFM PLL.
44 PCO O Charge pump output for master PLL.
45 FILO O Filter output for master PLL (slave = digital PLL).
46 FILI I Filter input for master PLL.
47 AVSS4 — Analog GND
48 CLTV I VCO control voltage input for master.
49 AVDD4 — Analog power supply
50 RFAC I EFM signal input
51 BIAS I Asymmetry circuit constant current input
4-1. IC PIN DESCRIPTIONS