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SECTION 5
DIAGRAMS
5-1.
IC PIN FUNCTION DESCRIPTION
•
SERVO BOARD IC105
CXD2545Q
(DIGITAL SIGNAL PROCESSOR, FOCUS/TRACKING/SLED SERVO, EFM COMPARATOR)
Pin No.
Pin Name
I/O
Function
1
SRON
O
Sled servo drive PWM signal output terminal Not used (open)
2
SRDR
O
Sled servo drive PWM signal (–) output to the BA6297AFP (IC106)
3
SFON
O
Sled servo drive PWM signal output terminal Not used (open)
4
TFDR
O
Tracking servo drive PWM signal (–) output to the BA6297AFP (IC106)
5
TRON
O
Tracking servo drive PWM signal output terminal Not used (open)
6
TRDR
O
Tracking servo drive PWM signal (+) output to the BA6297AFP (IC106)
7
TFON
O
Tracking servo drive PWM signal output terminal Not used (open)
8
FFDR
O
Focus servo drive PWM signal (+) output to the BA6297AFP (IC106)
9
FRON
O
Focus servo drive PWM signal output terminal Not used (open)
10
FRDR
O
Focus servo drive PWM signal (–) output to the BA6297AFP (IC106)
11
FFON
O
Focus servo drive PWM signal output terminal Not used (open)
12
VCOO
O
Oscillator circuit output terminal for analog PLL of the playback EFM Not used (open)
13
VCOI
I
Oscillator circuit input terminal for analog PLL of the playback EFM Not used (fixed at “L”)
14
TEST
I
Input terminal for the test (fixed at “L”)
15
DVSS
—
Ground terminal (digital system)
16
TES2
I
Input terminal for the test (fixed at “L”)
17
TES3
I
Input terminal for the test (fixed at “L”)
18
PDO
O
Charge-pump output terminal for analog PLL of the playback EFM Not used (open)
19
VPCO
O
PLL charge-pump output terminal for the variable pitch Not used (open)
20
VCKI
I
Clock signal input from external VCO for the variable pitch Not used (fixed at “L”)
21
AVD2
—
Power supply terminal (+5V) (analog system)
22
IGEN
I
Power supply terminal (+5V) (for operational amplifier)
23
AVS2
—
Ground terminal (analog system)
24
(ADIO)ADII
I
Input terminal for the A/D converter Not used (open)
25
(RFAC)ADIO
O
Output terminal of the operational amplifier Not used (open)
26
RFDC
I
RF signal (DC level) input terminal for the digital servo process
27
TE
I
Tracking error signal input from the RF amplifier in optical pick-up
28
SE
I
Sled error signal input from the RF amplifier in optical pick-up
29
FE
I
Focus error signal input from the RF amplifier in optical pick-up
30
VC
I
Middle point voltage (+2.5V) input from the RF amplifier in optical pick-up
31
FILO
O
Filter output terminal for master clock of the playback master PLL
32
FILI
I
Filter input terminal for master clock of the playback master PLL
33
PCO
O
Phase comparison output terminal for master clock of the playback EFM master PLL
34
CLTV
I
Internal VCO control voltage input of the playback master PLL
35
AVS1
—
Ground terminal (analog system)
36
RFAC
I
RF signal (AC level) input terminal for the EFM demodulator
37
BIAS
I
Constant current input terminal of the playback EFM asymmetry circuit
38
ASYI
I
Playback EFM asymmetry comparator voltage input terminal
39
ASYO
O
Playback EFM full-swing output terminal
40
AVD1
—
Power supply terminal (+5V) (analog system)
41
DVDD
—
Power supply terminal (+5V) (digital system)
42
ASYE
I
Playback EFM asymmetry circuit on/off selection input terminal (fixed at “H”)
43
PSSL
I
Audio data output mode selection input terminal (fixed at “L”)
Summary of Contents for CDP-X3000
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