Sony BKDS-2530, Operation Manual

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3(E)
!£
Test pin TP6
Used to check the processor I/O port outputs.
Connected to the buzzer.
!¢
Test pin TP7
Used to check the processor I/O port outputs. Clears
the watchdog timer
1) .
1) Watchdog timer
A function which generates a reset signal to reinitialize
the firmware if the firmware hangs. To keep from
generating the reset signal when firmware is running
normally, the timer is cleared periodically.
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Rear
1
Indicators D6 to D9
2
Switch S5
3
Switch S4
4
Connector CN7
5
Switch S2
6
Test pin TP11
7
Test pin TP12
8
Test pin TP10
9
Jumper COP1
0
Indicators D14 to D16
F G H L
K J
!¡
Termination switch
!™
Connector CN8
!£
Connector CN4
1
Indicators D6 to D9
Show information about the processor I/O board
outputs.
D6: unused
D7: blinks once per second
D8: blinks when vertical synchronization timing is
being synchronized to the internal timer output
D9: blinks when vertical synchronization timing is
being synchronized to an external reference signal
2
Switch S5
Sets the ISA bus address.
3
DIP Switch S4
Sets the ISA bus address (setting may not be changed).
4
Connector CN7 (40-pin)
Unused.