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N6
FEGIO7
3.3V LVTTL
General IO. The pin is spike-free at power-on stage. The pin is
I/O,
not allowed to pull-up in circuit layout.
5V-tolerance,
2,4,6,8 mA
PDR,
75K pull-down (0V)
R5
FEGIO9
3.3V LVTTL
General IO. The pin is spike-free at power-on stage.
I/O,
Alternate function :
5V-tolerance,
1. Internal monitored signal output
2,4,6,8 mA
2. Spoke input.
PDR,
3. Power on reset input, high active.
75K pull-down (0V)
4. General IO.
E4
HAVC
Analog Output
Decoupling Pin for Reference Voltage of Main and Sub Beams
C3
INA
Analog Input
Input of Main Beam Signal (A)
B1
INB
Analog Input
Input of Main Beam Signal (B)
C2
INC
Analog Input
Input of Main Beam Signal (C)
C1
IND
Analog Input
Input of Main Beam Signal (D)
E2
INE
Analog Input
Input of Sub-Beam Signal (E)
E1
INF
Analog Input
Input of Sub-Beam Signal (F)
D1
ING
Analog Input
Input of Sub-Beam Signal (G)
D2
INH
Analog Input
Input of Sub-Beam Signal (H)
Multiplexer Output 1 for Signal Monitoring. The pin is not
allowed to pull-up in circuit layout.
Alternate function: Internal monitored signal output / General
output.
Multiplexer Output 2 for Signal Monitoring. The pin is not
allowed to pull-up in circuit layout.
Alternate function: Internal monitored signal output / General
output.
Multiplexer Output 3 for Signal Monitoring. The pin is not
allowed to pull-up in circuit layout.
Alternate function : Internal monitored signal output / General
output.
3.3V LVTTL
High frequency modulation enable signal output, or LDD serial
I/O,
interface CLK or I2C SCL. The pin is spike-free at power-on
5V-tolerance,
stage
Slow slew,
2, 4, 6, 8mA
PDR,
75K pull-up (3.3V)
G2
RFIN
Analog Input
Differential Input of AC Coupling RF SUM Signal (Negative)
H2
RFIN2
Analog Input
Differential Input of AC Coupling RF SUM Signal (Negative)
G11
RFIP
Analog Input
Differential Input of AC Coupling RF SUM Signal (Positive)
H1
RFIP2
Analog Input
Differential Input of AC Coupling RF SUM Signal (Positive)
J3
TLO
Analog Output
Tilt servo output
3.3V LVTTL
Tray_is_in Input, A Logical Low Indicates the Tray is IN. Feedback
I/O,
Flag is from Tray Connector. The pin is spike-free at power-on
5V-tolerance,
stage
Slow slew,
2, 4, 6, 8mA
PDR,
75K pull-up (3.3V)
3.3V LVTTL
Tray_is _out input. A Logical Low Indicates the Tray is OUT.
I/O,
Feedback Flag is from Tray Connector. The pin is spike-free
5V-tolerance,
at power-on stage
Slow slew,
Alrenate function:
2, 4, 6, 8mA
General IO
PDR,
75K pull-up (3.3V)
P2
FETRAYPWM
Analog Output
Tray DAC/PWM contol output. Controlled by up.
A2
TRINA
Analog Input
Input of Tracking Signal (A)
B3
TRINB
Analog Input
Input of Tracking Signal (B)
A1
TRINC
Analog Output
Input of Tracking Signal (C)
B2
TRIND
Analog Output
Input of Tracking Signal (D)
J2
TRO
Analog Output
Tracking servo output. PDM output of tracking servo compensator
H3
V14
Analog Output
Output of Voltage Reference (1.4V)
E5
VDAC0
Analog Output
Output of General DAC
B4
FVREF
Analog Output
Output Voltage Reference
C6
VWDC2O
Analog Output
Output Voltage 2 of Laser Diode Control on APC
A4
VWDC3O
Analog Output
Output Voltage 3 of Laser Diode Control on APC
F4
MPXOUT1
Analog Output
Analog Output
F1
MPXOUT3
Analog Output
U4
FETRAYOUT__
MPXOUT2
F2
K3
FEOSCEN
T2
FETRAYIN_
6-11E
BDP-BX18/S285/S286
Summary of Contents for BDP-BX18
Page 27: ...2 2 BDP BX18 S185 S186 2 3 TOPPANEL 1 2 2 2 ...
Page 28: ...2 3 BDP BX18 S185 S186 2 3 TOPPANEL 2 2 1 2 ...
Page 84: ...History ver 0 10 2011 06 21 Manaka Kong First release BX18 S185 S186 8 2E ...
Page 105: ...REVISION HISTORY Ver Date Description of Revision 1 0 2011 08 New BDP BX18 S185 S186 ...