SN32F760 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 2
Version 2.0
AMENDENT HISTORY
Version
Date
Description
1.0
2014/02/27 First version released.
1.1
2014/05/23 1. Fix typing errors.
3. Update SN-LINK-V2 photos.
1.2
2015/03/06 1. Update GPIO & LCD driver characteristics in Chap
3. Add notice for power input pads.
4. Fix typing errors.
1.3
2015/05/29 1. Update QFN46 package information.
2. Update UART baud rate sample.
1.4
2015/08/21 1. Add Note for P2.n GPIO setting if ADC function is used.
PLL recommend input/output frequency setting table
1.5
2016/07/22 1. Fix typing errors.
2. Add Notice: HCLK MUST be equal or less than 24MHz during Flash program and
erase operations.
3. Update LQFP48 package information.
1.6
2016/12/02 1. Fix typing errors.
2. Remove SN32F74X & SN32F73X.
3. Remove SYSTICKPRE[1:0]
1.7
2017/06/05 1. Remove SYS0_ANTIEFT register.
2. Fix Deep Sleep mode wake up time.
3. Update SN-LINK-V3.0 information.
1.8
2017/07/14 1. Update WDTPRE[2:0] bits description in SYS1_APBCP1 register.
2. Update TO[15:0] bits description in I2Cn_TOCTRL register.
1.9
2. Add Note for setting the pins which are not pin-out.
2.0
2018/10/05 1. Add Boot pin description.
2. Fix maximum F
ADCLK
to 16MHz in Electrical Characteristics.