SMSC USB2504 Datasheet Download Page 44

Integrated USB 2.0 Compatible 4-Port Hub

Datasheet

Revision 2.3 (08-27-07)

44

SMSC USB2504/USB2504A

DATASHEET

Notes:

1. Output leakage is measured with the current pins in high impedance.

2. See USB 2.0 Specification for USB DC electrical characteristics.

3. RBIAS is a 3.3V tolerant analog pin.

CAPACITANCE T

A

 = 25°C; fc = 1MHz; 

V

DD33

 = 3.3V

Power Sequencing

There are no power supply sequence restrictions for the Hub. The order in which power supplies
power-up and power-down is implementation dependent.

Supply Current 
Configured
(Full-Speed Host)

1 Port 
2 Ports
3 Ports
4 Ports

I

FCC1

I

FCC2

I

FCC3

I

FCC4

150 
155 
160 
165

mA
mA
mA
mA

Total from all supplies

Supply Current
Suspend

I

CSBY

265 

uA

Total from all supplies.

Supply Current
Reset

I

RST

 150 

uA

Total from all supplies.

LIMITS

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

TEST CONDITION

Clock Input 
Capacitance

C

IN

12

pF

All pins except USB pins (and pins under 
test tied to AC ground)

Input Capacitance

C

IN

8

pF

Output Capacitance

C

OUT

12

pF

Table 8.1 DC Electrical Characteristics (continued) 

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

COMMENTS

Summary of Contents for USB2504

Page 1: ...ility Includes USB 2 0 Transceivers VID PID DID and Port Configuration for Hub via Single Serial I2 C EEPROM SMBus Slave Port Default VID PID DID allows functionality when configuration EEPROM is abse...

Page 2: ...nomalies which may cause the product s functions to deviate from published specifications Anomaly sheets are available upon request SMSC products are not designed intended authorized or warranted for...

Page 3: ...havior 26 5 3 3 General Call Address Response 26 5 3 4 Slave Device Time Out 27 5 3 5 Stretching the SCLK Signal 27 5 3 6 SMBus Timing 27 5 3 7 Bus Reset Sequence 27 5 3 8 SMBus Alert Response Address...

Page 4: ...Integrated USB 2 0 Compatible 4 Port Hub Datasheet Revision 2 3 08 27 07 4 SMSC USB2504 USB2504A DATASHEET Chapter 10 Package Outline 46...

Page 5: ...igure 3 1 4 Port 64 Pin TQFP 9 Figure 4 1 4 Port Block Diagram 10 Figure 5 1 LED Strapping Option 34 Figure 5 2 Reset_N Timing for Default Strap Option Mode 35 Figure 5 3 Reset_N Timing for EEPROM Mod...

Page 6: ...13 Table 4 4 Power Ground and No Connect 14 Table 4 5 Buffer Type Descriptions 15 Table 5 1 User Defined Descriptor Data 20 Table 5 2 SMBus Write Byte Protocol 26 Table 5 3 SMBus Read Byte Protocol 26...

Page 7: ...the USB2504 USB2504A following a reset This configuration may be sufficient for some applications Strapping option pins make it possible to modify a limited sub set of the configuration options The US...

Page 8: ...0 INTERFACE 26 PINS USBDP1 USBDN1 USBDP2 USBDN2 USBDP3 USBDN3 USBDP4 USBDN4 GR1 NON_REM0 GR2 NON_REM1 GR3 PRT_DIS0 GR4 PRT_DIS1 AM1 GANG_EN AM2 MTT_EN AM3 AM4 LED_EN PRTPWR1 PRTPWR2 PRTPWR3 PRTPWR4 O...

Page 9: ...18 VSS GR1 NON_REM0 VDD33 AM1 GANG_EN GR2 NON_REM1 AM2 MTT_EN OCS3_N PRTPWR2 OCS2_N VDD18 VSS CLKIN_EN TEST1 OCS1_N PRTPWR1 USBDP0 VDDA33 USBDN0 VSS USBDP1 USBDN1 VDDA33 USBDP2 USBDN2 USB2504 USB2504A...

Page 10: ...achable hub this pin must be connected to the VBUS power pin of the USB port that is upstream of the hub Use of a weak pull down resistor is recommended For self powered applications with a permanentl...

Page 11: ...ports are enabled GR4 is active high GR3 is active high PRT_DIS 1 0 01 Port 4 is disabled GR4 is active high GR3 is active low PRT_DIS 1 0 10 Ports 4 3 are disabled GR4 is active low GR3 is active hi...

Page 12: ...bled via EEPROM or SMBus If the hub is configured by the internal default configuration this pin will be sampled at RESET_N negation to determine if downstream port power switching and current sensing...

Page 13: ...face behavior X 0 0 Configured as an SMBus slave for external download of user defined descriptors SMBus slave address is 0101100 X 0 1 Configured as an SMBus slave for external download of user defin...

Page 14: ...internal 1 8V regulator or to VSS to disable the internal regulator When the internal regulator is enabled the 1 8V power pins must be left unconnected except for the required bypass capacitors When t...

Page 15: ...with Schmitt trigger O12 Output 12mA I O12 Input Output 12mA IOSD12 Open drain 12mA sink with Schmitt trigger and must meet I2C Bus Specification Version 2 1 requirements ICLKx XTAL Clock Input OCLKx...

Page 16: ...this particular product assigned by OEM This field is set by the OEM using either the SMBus or EEPROM interface options When using the internal default option SMSC s PID designation of see Table 5 1...

Page 17: ...t by the OEM using either the SMBus or EEPROM interface options 5 1 1 9 Current Sensing Selects current sensing on a port by port basis all ports ganged or none only for bus powered hubs The ability t...

Page 18: ...option the PRT_DIS 1 0 pins will disable the appropriate ports 5 1 1 15 Dynamic Power Controls the ability of the 4 Port Hub to automatically change from Self Powered operation to Bus Powered operati...

Page 19: ...m VBUS signal and will not pull up the D or D resistor if VBUS is not active If VBUS goes from an active to an inactive state Not Powered Hub will remove power from the D or D pull up resistor within...

Page 20: ...424 0424 Vendor ID assigned by USB IF PID 3 2 2 4 port 2504 4 Port 2504 Product ID assigned by Manufacturer DID 5 4 2 0000 0000 Device ID assigned by Manufacturer Config Data Byte 1 6 1 98 1C Configur...

Page 21: ...e of the Device ID BIT NUMBER BIT NAME DESCRIPTION 7 SELF_BUS_PWR Self or Bus Power Selects between Self and Bus Powered operation 0 Bus Powered operation BUS Default 1 Self Powered operation SELF Def...

Page 22: ...red configurations only and is the default for bus power 0 PORT_PWR Port Power Switching Indicates whether port power switching is on a port by port basis or ganged 0 Ganged switching all ports togeth...

Page 23: ...vable Bit 2 1 Port 2 non removable Bit 1 1 Port 1 non removable Bit 0 is Reserved always 0 BIT NUMBER BIT NAME DESCRIPTION 7 0 PORT_DIS_SP Port Disable Self Powered Disables 1 or more contiguous ports...

Page 24: ...NUMBER BIT NAME DESCRIPTION 7 0 MAX_PWR_BP Max Power Bus_Powered Value in 2mA increments that the Hub consumes from an upstream port VBUS when operating as a bus powered hub This value includes the hu...

Page 25: ...he registers in the device The register set is shown in Section 5 3 9 Internal SMBus Memory Register Set on page 27 5 3 1 Bus Protocols Typical Write Byte and Read Byte protocols are shown below Regis...

Page 26: ...be read if the protocol shown in Table 5 3 is performed correctly Only one byte is transferred at a time for a Read Byte protocol 5 3 2 Invalid Protocol Response Behavior Registers that are accessed w...

Page 27: ...g Specification See the SMBus timing in the Timing Diagram section 5 3 7 Bus Reset Sequence The SMBus Slave Interface resets and returns to the idle state upon a START field followed immediately by a...

Page 28: ...tect The external SMBus host sets this bit after the Hub s internal memory is loaded with configuration data Note The External SMBus Host is responsible for verification of downloaded data 0 The inter...

Page 29: ...st Significant Byte of the Product ID BIT NUMBER BIT NAME DESCRIPTION 7 0 PID_MSB Most Significant Byte of the Product ID BIT NUMBER BIT NAME DESCRIPTION 7 0 DID_LSB Least Significant Byte of the Devi...

Page 30: ...by port basis or ganged or no overcurrent sensing 00 Ganged sensing all ports together 01 Individual port by port 1x Over current sensing not supported must only be used with Bus Powered configuratio...

Page 31: ...ovable Bit 3 1 Port 3 non removable Bit 2 1 Port 2 non removable Bit 1 1 Port 1 non removable Bit 0 is Reserved always 0 BIT NUMBER BIT NAME DESCRIPTION 7 0 PORT_DIS_SP Port Disable Self Powered Disab...

Page 32: ...all associated circuitry on the board This value also includes the power consumption of a permanently attached peripheral if the hub is configured as a compound device and the embedded peripheral rep...

Page 33: ...ils on how to enable the default pin strap configuration option The strapping option pins only cover a limited sub set of the configuration options The internal default values will be used for the bit...

Page 34: ...the upstream USB power source 300 A for the Hub and 200 A for the external circuitry Assertion of RESET_N external pin causes the following 1 All downstream ports are disabled and PRTPWR power to dow...

Page 35: ...of RESET_N Table 5 5 Reset_N Timing for Default Strap Option Mode NAME DESCRIPTION MIN TYP MAX UNITS t1 RESET_N Asserted 1 sec t2 Strap Setup Time 16 7 nsec t3 Strap Hold Time 16 7 1400 nsec t4 hub ou...

Page 36: ...on Chapter 8 DC Parameters prior to or coincident with the assertion of RESET_N Table 5 6 Reset_N Timing for EEPROM Mode NAME DESCRIPTION MIN TYP MAX UNITS t1 RESET_N Asserted 1 sec t2 Hub Recovery St...

Page 37: ...5 6 2 USB Bus Reset In response to the upstream port signaling a reset to the Hub the Hub does the following Note The Hub does not propagate the upstream USB reset to downstream devices 1 Sets default...

Page 38: ...2504A DATASHEET 5 Moves device from suspended to active if suspended 6 Complies with Section 11 10 of the USB 2 0 Specification for behavior after completion of the reset sequence The Host then config...

Page 39: ...ded when this option is selected are very similar but not identical to those that were loaded in the USB20H04 The CFG_SEL 2 0 pins will properly select this method if the existing USB20H04 design was...

Page 40: ...y tests all signal pins on the Hub every pin except for NC XTAL1 CLKIN XTAL2 ATEST REG_EN RBIAS TEST1 Power and Ground This functionality is enabled by driving TEST1 and CFG_SEL 1 high driving SCLK lo...

Page 41: ...lies it is important that the Absolute Maximum Ratings not be exceeded or device failure can result Some power supplies exhibit voltage spikes on their outputs when the AC power is switched on or off...

Page 42: ...1 0 3 VDDA33 V Voltage on XTAL2 0 3 VDD18 V Table 8 1 DC Electrical Characteristics PARAMETER SYMBOL MIN TYP MAX UNITS COMMENTS I IS Type Input Buffer Low Input Level High Input Level Input Leakage Hy...

Page 43: ...Output Level Output Leakage VOL IOL 10 0 4 10 V A IOL 12mA VDD33 3 3V VIN 0 to VDD33 Note 1 I OSD12 Type Buffer Low Output Level Output Leakage Hysteresis VOL IOL VHYSI 10 250 300 0 4 10 350 V A mV IO...

Page 44: ...upplies power up and power down is implementation dependent Supply Current Configured Full Speed Host 1 Port 2 Ports 3 Ports 4 Ports IFCC1 IFCC2 IFCC3 IFCC4 150 155 160 165 mA mA mA mA Total from all...

Page 45: ...100ps rms 9 1 1 SMBus Interface The SMSC Hub conforms to all voltage power and timing characteristics and specifications as set forth in the SMBus 1 0 Specification for Slave Only devices except as n...

Page 46: ...t length L measured at the gauge plane 0 25 mm above the seating plane 5 Details of pin 1 identifier are optional but must be located within the zone indicated Table 10 1 64 Pin TQFP Package Parameter...

Reviews: