EVB-USB3320 USB Transceiver Evaluation Board User Manual
Revision 1.0 (02-09-10)
6
SMSC EVB-USB3320
USER MANUAL
3 Getting Started
The block diagram in
gives a simplified view of the EVB-USB3320 EVB. The EVB-USB3320
is ready for device operation. To modify the board for OTG or Host applications, refer to
or
, respectively.
It is required to p5V to T&MT connector pin 28 and +3.3V on T&MT pins 8,16,57,69 to power
the EVB-USB3320.
The EVB-USB3320 is built with a USB Mini-AB receptacle. Do not substitute a Mini-AB receptacle
different from the one specified in the bill of materials, or a short circuit may occur on the USB signals
at the Micro-AB connector PCB footprint.
When the EVB-USB3320 is powered on, check the following things to be certain the board is
functioning normally:
RESET should be de-asserted (logic low at the T&MT connector and RESETB at the USB3320
should be logic high = VDD18). If RESETB=0, the USB3320 will be in a low power state.
The voltage at R2 (RBIAS) should be 0.8V DC. If this voltage is not present, the USB3320 is in a
low power state.
There should be a digital 60 MHz square wave signal at T&MT connector pin 90. The amplitude
should be approximately VDDIO. This is the CLKOUT signal of the USB3320.
Figure 3.1 Block Diagram of EVB-USB3320
VBUS
Switch
ULPI Signals
VBUS
ID
DP
DM
J1
100-pin
T&MT
2.2uF
150uF
ONA
FAULTAn
VDD3.3
+5V
DP
DM
ID
ULPI Bus
GND
Install C20=150uF if host
operation is desired
RESETB
VDD1p8
VDD3p3
VBAT
2.2uF
1.8V
LDO
XI
EXT_VBUS_DET
USB3320
RESET
PCB can accept Micro-AB
Or Mini-AB receptacle
CPEN
XO
VDDIO
VARIABLE
VDDIO
REG
REFSEL[2:0]
USER
REFCLK
CONFIG
