5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
[LSADC0]KEY0
[LSADC1]KEY1
[GPIO130]GPIO/PCMCIA_PWR_EN
[LSADCREF]LSADCREF
[LSADC2]Light-Sensor / GPIO
[LSADC4]Body-Sensor / GPIO
Falsh ROM
|___
_
____
|
To Flash ROM
C
rystal
1
NAND ECC type bit[1]
0xb801_0128[1]
PAD_GPIO_127
BALL_G22
1
ROM boot (BALL_D22
PAD_ST_GPIO_16)
0 : boot from ROM
1 : don't boot from ROM
Flash type (ALL_D25
PAD_ST_GPIO_15)
0 : SPI-Flash boot
1 : NAND-Flash boot
PLL_EN (BALL_G25
PAD_SPI_CS_N)
0 : Disable
1 : Enable
BALL_D25
1
BALL_G25
Power-On-Latch (POL)
BALL_D22
BALL_H24
BALL_H22
1
1
test mode (BALL_H24
PAD_SPI_DO)
0 : enable
1 : disable
EJTAG
(BALL_H22 PAD_SPI_SCK)
0 : enable
1 : disable
UART selection (BALL_J22 PAD_GPIO_123)
0 : VGADDC
1 : GPIO123/124
BALL_J22
1
NAND ECC type bit[0]
0xb801_0128[0]
PAD_GPIO_126
BALL_H21
1
HIF_Selection_n
(BALL_C24 PAD_ST_GPIO_17)
0 : HIF Enable
1 : HIF Disable
BALL_C24
1
LVDS
[ST_GPIO14]ST_GPIO (PANEL_EN)
ST15_MUTE
[ST_GPIO22]ST_GPIO (LED)
[ST_GPIO20]ST_GPIO (PWR_EN)
[ST_GPIO19]GPIO/IRTX(PWM)
[ST_GPIO17]IRRX
[ST_GPIO18]ST_GPIO (PWR_KEY)
[ST_GPIO16]ST_GPIO (BL_EN)
[GPIO7]SPDIF_OUT/I2S_OUT_D2
[GPIO116]I2C_Extension/GPIO
[GPIO117]I2C_Extension/GPIO
[GPIO118]LD/GPIO (EEPROM WP)
[GPIO119]LD/GPIO (FLASH WP)
[GPIO123]default UART
[GPIO124]default UART
S K Y W O R T H
创
维
To LVDS
2D_3D_SELECT
LEDG
I2C_SDA
BL_ADJ
LSADC0
LSADC1
TX_CCP_
TX_CDP_
TX_CEP_
TX_C_CKP_
TX_CCN_
TX_CBN_
TX_CAN_
TX_CDN_
TX_C_CKN_
TX_CEN_
TX_CAP_
TX_CBP_
AMP_MUTE
LEDG
I2C_SCL
TX_AAP_
TX_ABP_
TX_AAN_
TX_ABN_
TX_A_CKP_
TX_ADP_
TX_ACP_
TX_ACN_
TX_ADN_
TX_A_CKN_
TX_AEP_
TX_AEN_
BL_EN
SPI_CS#
N_CLE/SPI_SCLK
N_ALE/SPI_SDO
N_CE0#
N_CE1#
N_RE#
N_WE#
N_DATA7
N_DATA6
N_DATA5
N_DATA4
N_DATA3
N_DATA2
N_DATA1
N_DATA0
N_RDY
LSADC0
LSADC1
N_DATA7
N_DATA6
N_DATA5
N_DATA4
N_DATA3
N_DATA2
N_DATA1
N_DATA0
N_RDY
SPI_CS#
N_CLE/SPI_SCLK
N_ALE/SPI_SDO
IRRX
POWER_EN
IRRX
BL_ADJ
PANEL_EN
POWER_EN
BL_EN
IRRX
LEDG
N_CLE/SPI_SCLK
N_CE0#
N_CE1#
N_RE#
N_WE#
N_ALE/SPI_SDO
LSADC_REF
LSADC2
RESET#
XOUT
XIN
XIN
XOUT
I2S_O_SCLK
I2S_O_D0
I2S_O_WCLK
I2S_O_MCLK
I2S_O_WCLK
I2S_O_D0
I2S_O_MCLK
I2S_O_SCLK
I2C_SCL
URAT_TX
URAT_TX
N_WE#
N_RE#
LSADC2
URAT_RX
LSADC_REF
RESET#
PANEL_EN
AMP_MUTE
2D_3D_SELECT
SPDIF_OUT
TX_BCP_
TX_BBP_
TX_BAP_
TX_BDP_
TX_B_CKP_
TX_BEP_
TX_BCN_
TX_BBN_
TX_BAN_
TX_BDN_
TX_B_CKN_
TX_BEN_
TX_DCP_
TX_DBP_
TX_DAP_
TX_D_CKP_
TX_DDP_
TX_DEP_
TX_DCN_
TX_DBN_
TX_DAN_
TX_DDN_
TX_DEN_
TX_D_CKN_
TX_BCP_
TX_BBP_
TX_BAP_
TX_BDP_
TX_B_CKP_
TX_A_CKP_
TX_ADP_
TX_ACP_
TX_BEP_
TX_BCN_
TX_BBN_
TX_BAN_
TX_BDN_
TX_B_CKN_
TX_BEN_
TX_ACN_
TX_ADN_
TX_A_CKN_
TX_AEP_
TX_AEN_
TX_AAP_
TX_ABP_
TX_AAN_
TX_ABN_
TX_DCP_
TX_DBP_
TX_DAP_
TX_D_CKP_
TX_DDP_
TX_CCP_
TX_CDP_
TX_CEP_
TX_DEP_
TX_C_CKP_
TX_DCN_
TX_DBN_
TX_DAN_
TX_DDN_
TX_DEN_
TX_D_CKN_
TX_CCN_
TX_CBN_
TX_CAN_
TX_CDN_
TX_C_CKN_
TX_CEN_
TX_CAP_
TX_CBP_
LD_EN
CTR2
TCON_LR
UART_RX2
UART_TX2
CTR2
D3V3
DGND
D3V3
CORE_1V0
ST_1V0
DGND
D3V3
D3V3
DGND
D3V3
D3V3
D3V3
D3V3
D3V3
DGND
DGND
DGND
D3V3
ADC_3V3
PLL_1V0
PLL_GND
PLL_GND
PLL_1V0
A1V0
PLL_GND
DGND
DGND
DGND
DGND
AGND
DGND
AGND
DGND
D3V3
D3V3
DGND
DGND
ST_1V0
D3V3
N_DATA0
<6>
N_DATA1
<6>
N_DATA2
<6>
N_DATA3
<6>
N_DATA4
<6>
N_DATA5
<6>
N_DATA6
<6>
N_DATA7
<6>
N_CE1#
<6>
N_CE0#
<6>
I2C_SDA
<14>
2D_3D_SELECT
<IREF>
I2C_SCL
<14>
LSADC0
<19>
LSADC1
<19>
BL_ADJ
<8>
AMP_MUTE
<14>
POWER_EN
<19,22>
LEDG
<19>
PANEL_EN
<8>
BL_EN
<8,21>
IRRX
<19>
N_WE#
<6>
N_RE#
<6>
N_RDY
<6>
N_CLE/SPI_SCLK
<6>
N_ALE/SPI_SDO
<6>
I2S_O_SCLK
<14>
I2S_O_WCLK
<14,19>
I2S_O_MCLK
<14,19>
I2S_O_D0
<14,19>
LSADC2
URAT_TX
URAT_RX
RESET#
I2C_SDA
I2C_SCL
OPC-EN
SPDIF_OUT
TX_CCN_
<8>
TX_CBP_
<8>
TX_CBN_
<8>
TX_CAP_
<8>
TX_CAN_
<8>
TX_CEP_
<8>
TX_CEN_
<8>
TX_CDP_
<8>
TX_CDN_
<8>
TX_C_CKP_
<8>
TX_C_CKN_
<8>
TX_CCP_
<8>
TX_DEP_
<8>
TX_DEN_
<8>
TX_BCN_
<8>
TX_BBP_
<8>
TX_DDP_
<8>
TX_BBN_
<8>
TX_BAP_
<8>
TX_BAN_
<8>
TX_BEP_
<8>
TX_BEN_
<8>
TX_BDP_
<8>
TX_BDN_
<8>
TX_B_CKP_
<8>
TX_B_CKN_
<8>
TX_BCP_
<8>
TX_DDN_
<8>
TX_D_CKP_
<8>
TX_D_CKN_
<8>
TX_ACN_
<8>
TX_ABP_
<8>
TX_ABN_
<8>
TX_AAP_
<8>
TX_AAN_
<8>
TX_AEP_
<8>
TX_AEN_
<8>
TX_ADP_
<8>
TX_ADN_
<8>
TX_A_CKP_
<8>
TX_A_CKN_
<8>
TX_ACP_
<8>
TX_DCP_
<8>
TX_DCN_
<8>
TX_DBP_
<8>
TX_DBN_
<8>
TX_DAP_
<8>
TX_DAN_
<8>
SCN_EN
LD_EN
TCON_LR
VID0
UART_TX2 <6>
UART_RX2 <6>
TU_SW
<6>
HDMI2_ARC_EN
<9>
HDMI1_ARC_EN
<9>
EAR_MUTE
CTR2 <6>
EN_MHL <9>
INT_MHL <9>
Title
Size
Document Number
R e v
Date:
Sheet
o f
<Doc>
<RevCode>
RTD2975-3
Custom
3
17
Thursday, June 20, 2013
Title
Size
Document Number
R e v
Date:
Sheet
o f
<Doc>
<RevCode>
RTD2975-3
Custom
3
17
Thursday, June 20, 2013
Title
Size
Document Number
R e v
Date:
Sheet
o f
<Doc>
<RevCode>
RTD2975-3
Custom
3
17
Thursday, June 20, 2013
C2
22pF
R48
0R
RS36
NC_4K7
R5
NC
RS9
10K
RS41
NC_4.7K
R8
4.7K
CS60
100nF
RTD2975 20x20
U1F
AFP
Y25
AFN
Y24
AEP
W25
AEN
W24
ACKP
V25
ACKN
V24
ACP
U25
ACN
U24
ABP
T25
ABN
T24
AAP
R25
AAN
R24
BFP
W20
BFN
V20
BEP
W23
BEN
W22
BCKP
W21
BCKN
V22
BCP
V21
BCN
U23
BBP
U22
BBN
U21
BAP
T22
BAN
T21
LV33
G20
GND
U12
CFP
P25
CFN
P24
CEP
N25
CEN
N24
CLKP
M25
CLKN
M24
CCP
L25
CCN
L24
CBP
K25
CBN
K24
CAP
J25
CAN
J24
DFP
U20
DFN
T20
DEP
R23
DEN
R22
DCKP
R21
DCKN
P22
DCP
P21
DCN
N23
DBP
N22
DBN
N21
DAP
M22
DAN
M21
RS12
10K
R4
0R
CS65
NC_1uF
R10
4.7K/NC
R2
0R
R46
0R
LS16
BEAD
RS40
NC_4K7
RS38
4K7
R124
0R
L6
150R_1A
R47
NC
RTD2975 20x20
U1E
S_DI
H25
S_CS#
G25
GP45/N_CE1#
G24
GP46/N_CE0#
G23
GP126/N_WR#
H21
GP127/N_RD#
G22
N_CLE/S_SCLK
H22
N_ALE/S_DO
H24
ST6/N_D0
D20
ST13/N_D7
F25
ST7/N_D1
E21
ST8/N_D2
E22
ST9/N_D3
E23
ST10/N_D4
F21
ST11/N_D5
F22
ST12/N_D6
F24
ST21/N_RDY
G21
GP8/TPO_D2
AE25
GP9/TPO_D3
AD25
GP10/TPO_D4
AC25
GP11/TPO_D5
AC24
GP12/TPO_D6
AA22
GP13/TPO_D7
AB25
GP14/TPO_D0
AB24
GP15/TPO_D1
AA25
GP23/TPO_SYNC
Y22
GP24/TPO_VAL
Y21
TP_O_CLK
AB13
TP2_D2
AB19
TP2_CLK_IN
AB14
TP2_VAL_IN
AB15
TP2_SYNC_IN
AB16
TP2_D0
AB17
TP2_D1
AB18
TP2_D3
AB20
TP2_D4
AB21
TP2_D5
AA18
TP2_D6
AA19
TP2_D7
AA20
GP102/IREQ
R20
GP104/INPACK#
P20
GP106/WAIT
N20
GP107/CD#
M20
RS33
4K7
R107
4.7K/NC
RS39
4K7
RTD2975 20x20
U1G
CO10
L6
CO10
K15
CO10
K14
CO10
K13
CO10
K12
CO10
K11
CO10
K10
CO10
K7
CO10
K6
EFUSE33
F19
GP118
L21
GP119
L23
GP116
C10
GP117
L22
GP112/I_D0
AB23
GP113/I_D1
AA23
GP18/I_D2
AA24
GP130
K22
GP7/SPDIF_O
AE24
GP123/UART
J22
GP124/UART
J21
LDO_33
E20
LS0/KEY0
E24
LSREF
D17
LS2
D15
LS1/KEY1
E25
LS4
D14
RST
D12
ST15/MUTE
D25
ST14/PAN_EN
D24
ST16/BL_EN
D22
ST18/PWR_KEY
C25
ST17/IRRX
C24
ST19/IRTX
D21
ST20/PWR_EN
B25
ST22/LED
A25
XOUT
C1
XIN
C2
XORTC
F13
XIRTC
D13
STV10
F4
V33
G19
RTC33
H20
PLLG
B1
PLLV33
F16
PLLV10
B2
GND
W9
GND
L9
GND
U11
GND
U14
GND
U15
GND
U10
GND
N11
GND
N10
GND
W16
GND
W15
GND
W12
GND
V13
GND
V14
GND
V15
GND
V12
CO10
L7
CO10
M6
CO10
M7
GND
L10
GND
L11
GND
L12
GND
L13
GND
L14
GND
L15
GND
M9
GND
M10
GND
M11
GND
M12
GND
M13
GND
M14
GND
M15
GND
N9
GND
N12
GND
N13
GND
N14
GND
N15
GND
P9
GND
P12
GND
P13
GND
P14
GND
P15
GND
R9
GND
R12
GND
R13
GND
R14
GND
R15
GND
R16
GND
T9
GND
T16
GND
U9
GND
V9
GND
T12
RS35
4K7
RS34
4K7
CS64
100nF
Y1
27MHz
1
2
3
RS48
4.7K
RS37
4K7
R24
4.7K/NC
RS49
4.7K
RS47
NC
C5
22pF
CS63
1uF
CS62
10uF
Summary of Contents for 5R81A-50E79
Page 13: ... 13 SYSTEM BLOCK DIAGRAM 5R81A 50E79 SYSTEM BLOCK ...
Page 15: ... 15 IC Block Diagram ...
Page 16: ... 16 ...
Page 17: ... 17 ...
Page 18: ... 18 2 5711 ...
Page 19: ... 19 ...
Page 20: ... 20 ...
Page 21: ... 21 Main PCB Top ...
Page 22: ... 22 Main PCB Bottom ...