SimpleTech Zeus Ultra, Product Information

Page: 25 / 48

Principles of Operation Functional Description
Zeus Ultra DMA Solid State Drives 19
2.2 P
RINCIPLES OF
O
PERATION
The Zeus SSD comprises three primary functional blocks—the ATA (IDE) interface
connector, Zeus SSD controller and NAND flash memory. A description of each drive
component is provided in “Zeus SSD Functional Blocks” on page 13.
All read/write data transfer requests are initiated by the host via the ATA (IDE) bus
interface. Once received, the Zeus controller, under the control of the SSD’s
microcontroller, processes the request.
Commands that do not require data to be read from or written to the flash memory
controller are typically handled by the Zeus controller. Some commands may require the
Zeus controller to use external circuitry (for example, Intelligent Destructive Purge™),
which do not involve the flash memory controller.
When a write operation is requested and data is received, the Zeus controller uses
integrated DMA controllers to transfer the data from host memory to the SSD’s flash
memory controller. Through a standard ATA (IDE) interface, the flash memory controller
transfers the data from the Zeus controller to available locations in the SSD’s local flash
memory. Depending on drive configuration, Zeus SSD storage capacity can range
between from 2GB to 128GB, with internal IDE transfer rates ranging from 10 to 60 MB
per second. After the write operation completes, the Zeus controller notifies the host.
If a read request is received, the Zeus controller retrieves the data from the local flash
memory via the flash memory controller. If the Zeus controller is responding to a PIO read
operation, it presents the data to the ATA bus. If it is responding to a UDMA read request,
the Zeus controller writes the data directly to system memory on the host. Regardless of
the type of operation (PIO or UDMA), the Zeus controller notifies the host when the data
is ready for transmission.
The SSD’s microcontroller is responsible for initiating and controlling
all activity within the Zeus controller—including bad block mapping and
executing the wear-leveling algorithms.
The Zeus controller decodes an incoming host command, and sets up
the appropriate interrupts and status for the local microprocessor to
handle various ATA commands. For read and write transfer commands,
the hardware can handle the initial handshake with the host
automatically. If firmware enables full auto mode, read and write
transfers can be fully handled by hardware with minimum firmware
support.