Smart Machine Smart Decision
SIM7600V-H_User Manual_V1.00
2018-02-24
7
Figure Index
Figure 1 : SIM7600V-H Block Diagram..............................................................................................................10
Figure 2 : Pin assignment overview..................................................................................................................... 12
Figure 3 : Dimensions (Unit: mm)....................................................................................................................... 18
Figure 4 : Footprint recommendation (Unit: mm)................................................................................................19
Figure 5 : Power supply application circuit..........................................................................................................20
Figure 6 : Linear regulator reference circuit........................................................................................................ 21
Figure 7 : Switching modepower supply reference circuit...................................................................................21
Figure 8 : ReferencePower on/off circuit............................................................................................................. 22
Figure 9 : Power on timing sequence................................................................................................................... 23
Figure 10 : Power off timing sequence................................................................................................................ 24
Figure 11 : Reference reset circuit........................................................................................................................25
Figure 12 : UART full modem............................................................................................................................. 26
Figure 13 : UART null Modem............................................................................................................................ 26
Figure 14 : Reference circuit of level shift...........................................................................................................26
Figure 15 : RI behaviour
（
SMS and URC report
）
............................................................................................27
Figure 16 : RI behaviour
（
voice call
）
...............................................................................................................27
Figure 17 : USB reference circuit.........................................................................................................................28
Figure 18 : USIM interface reference circuit....................................................................................................... 29
Figure 19 : Amphenol SIM card socket................................................................................................................30
Figure 20 : PCM_SYNC timing...........................................................................................................................31
Figure 21 : EXT codec to module timing.............................................................................................................31
Figure 22 : Module to EXT codec timing............................................................................................................ 32
Figure 23 : Audio codec reference circuit............................................................................................................ 33
Figure 24 : I2C reference circuit.......................................................................................................................... 33
Figure 25 : NETLIGHT reference circuit.............................................................................................................34
Figure 26 : ISINK reference circuit......................................................................................................................35
Figure 27 : Antenna matching circuit (MAIN_ANT).......................................................................................... 38
Figure 28 : Antenna matching circuit (DIV_ANT)..............................................................................................39
Figure 29 : Antenna matching circuit (MAIN_ANT).......................................................................................... 41
Figure 30 : Active antenna circuit........................................................................................................................ 42
Figure 31 : Passive antenna circuit (Default)....................................................................................................... 42
Figure 32 : Top and bottom view of Module........................................................................................................48
Figure 33 : The ramp-soak-spike Reflow Profile of Module............................................................................... 48
Figure 34 : Packaging introduce...........................................................................................................................50
Figure 35 : Module tray drawing introduce..........................................................................................................50
Figure 36 : Small carton drawing introduce.........................................................................................................51
Figure 37 : Big carton drawing introduce............................................................................................................ 51
Figure 38 : Reference design................................................................................................................................52
