S i M 3 L 1 x x
40
Rev 1.1
4.3. Clocking
The SiM3L1xx devices have two system clocks: AHB and APB. The AHB clock services memory peripherals and is
derived from one of seven sources: the RTC timer clock (RTC0TCLK), the Low Frequency Oscillator, the Low
Power Oscillator, the divided Low Power Oscillator, the External Oscillator, the PLL0 Oscillator, and the VIORFCLK
pin input. In addition, a divider for the AHB clock provides flexible clock options for the device. The APB clock
services data peripherals and is synchronized with the AHB clock. The APB clock can be equal to the AHB clock or
set to the AHB clock divided by two.
The Clock Control module on SiM3L1xx devices allows the AHB and APB clocks to be turned off to unused
peripherals to save system power. Any registers in a peripheral with disabled clocks will be unable to be accessed
until the clocks are enabled. Most peripherals have clocks off by default after a power-on reset.
Figure
4.3.
SiM3L1xx Clocking
Summary of Contents for SiM3L1xx
Page 2: ...2 Rev 1 1 ...
Page 62: ...SiM3L1xx 62 Rev 1 1 6 2 SiM3L1x6 Pin Definitions Figure 6 2 SiM3L1x6 GQ Pinout ...
Page 63: ...SiM3L1xx Rev 1 1 63 Figure 6 3 SiM3L1x6 GM Pinout ...
Page 69: ...SiM3L1xx Rev 1 1 69 6 3 SiM3L1x4 Pin Definitions Figure 6 4 SiM3L1x4 GM Pinout ...
Page 74: ...SiM3L1xx 74 Rev 1 1 6 4 TQFP 80 Package Specifications Figure 6 5 TQFP 80 Package Drawing ...
Page 81: ...SiM3L1xx Rev 1 1 81 6 6 TQFP 64 Package Specifications Figure 6 9 TQFP 64 Package Drawing ...
Page 89: ...SiM3L1xx Rev 1 1 89 Figure 7 3 SiM3L1x4 GM Revision Information ...
