S i 5 3 2 8 - E V B
4
Rev. 0.1
Figure 3. SPI Mode Serial Data Flow
This EVB can be powered solely by the USB port if the Si5328 and the TCXO are both operating at 3.3 V. The
factory default powers the entire board with 3.3 V from the USB connection. If a different Si5328 voltage is desired,
the jumper at J19 can be moved so that it is between pins J13.1 and J13.2. Si5328 power is then supplied at J30.
There are eight LEDs, as described in
Table 1.
The Evaluation board has a serial port connector (J17) that supports the following:
Control by the MCU/CPLD of an Any-Frequency part on an external target board.
Control of the Si5328 that is on the Eval board through an external SPI or I
2
C port.
For details, see J17 (Table 4).
Though they are not needed on this Evaluation Board because the CPLD has low output leakage current, some
applications will require the use of external pullup and pulldown resistors when three level pins are being driven by
external logic drivers.
5.5. MCU
The MCU is responsible for connecting the evaluation board to the PC so that PC resident software can be used to
control and monitor the Si5328. The USB connector is J3 and the debug port, by which the MCU is flashed, is J24.
The reset switch, SW1, resets the MCU, but not the CPLD. The MCU is a self-contained USB master and runs all
of the code required to control and monitor the Si5328.
U4 contains a unique serial number for each board and U3 is an EEPROM that is used to store configuration
information for the board. The board powers up in free run mode with a configuration that is outlined in "Appendix—
Powerup and Factory Default Settings" on page 15.
U3 configures the EVB for a specific frequency plan as described in "Appendix—Powerup and Factory Default
Settings" on page 15.
LVPECL outputs will not function at 1.8 V. If the Si532x part is to be operate at 1.8 V, the output format
needs to be changed by altering the SFOUT register bits.
MCU
CPLD
Si5328
SS_CPLD_B
SCLK
MOSI
MISO
SS_B
SCLK
SDI
SDO
DUT_PWR
+3.3 V