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S i 5 3 2 8 - E V B

4

Rev. 0.1

Figure 3. SPI Mode Serial Data Flow

This EVB can be powered solely by the USB port if the Si5328 and the TCXO are both operating at 3.3 V. The
factory default powers the entire board with 3.3 V from the USB connection. If a different Si5328 voltage is desired,
the jumper at J19 can be moved so that it is between pins J13.1 and J13.2. Si5328 power is then supplied at J30.
There are eight LEDs, as described in

 

Table 1.

The Evaluation board has a serial port connector (J17) that supports the following:



Control by the MCU/CPLD of an Any-Frequency part on an external target board.



Control of the Si5328 that is on the Eval board through an external SPI or I

2

C port.

For details, see J17 (Table 4). 

Though they are not needed on this Evaluation Board because the CPLD has low output leakage current, some
applications will require the use of external pullup and pulldown resistors when three level pins are being driven by
external logic drivers.

5.5.  MCU

The MCU is responsible for connecting the evaluation board to the PC so that PC resident software can be used to
control and monitor the Si5328. The USB connector is J3 and the debug port, by which the MCU is flashed, is J24.
The reset switch, SW1, resets the MCU, but not the CPLD. The MCU is a self-contained USB master and runs all
of the code required to control and monitor the Si5328.

U4 contains a unique serial number for each board and U3 is an EEPROM that is used to store configuration
information for the board. The board powers up in free run mode with a configuration that is outlined in "Appendix—
Powerup and Factory Default Settings" on page 15.

U3 configures the EVB for a specific frequency plan as described in "Appendix—Powerup and Factory Default
Settings" on page 15.

LVPECL outputs will not function at 1.8 V. If the Si532x part is to be operate at 1.8 V, the output format
needs to be changed by altering the SFOUT register bits.

MCU

CPLD

Si5328

SS_CPLD_B

SCLK

MOSI

MISO

SS_B

SCLK

SDI

SDO

DUT_PWR

+3.3 V

Summary of Contents for Si5328-EVB

Page 1: ...lock signal format LVPECL LVDS CML CMOS and output phase adjustment between output clocks For more details consult the Silicon Laboratories timing products web site at www silabs com timing The evalua...

Page 2: ...atories Precision Clock EVB Software and selecting one of the programs 5 Functional Description The Si5328 EVB software allows for a complete and simple evaluation of the functions features and perfor...

Page 3: ...ion being to Vdd If an external reference oscillator is in use it can be either single ended or differential To use an external oscillator make the following changes 1 Remove R64 so that the TCXO powe...

Page 4: ...rs when three level pins are being driven by external logic drivers 5 5 MCU The MCU is responsible for connecting the evaluation board to the PC so that PC resident software can be used to control and...

Page 5: ...are eight LEDs on the board which provide a quick and convenient means of determining board status Table 1 LED Status and Description LED Color Label D1 Green 3 3 V D2 Green DUT_PWR D5 Red LOL D4 Red...

Page 6: ...stances when A Vdd of 2 5 V or 1 8 V is desired the jumper plug at J19 labeled DUT_PWR should be moved from the USB position to the EXT position DUT power should be applied at J30 which is the green p...

Page 7: ...n the Evaluation Board from an external serial port open the Register Programmer connect to the Evaluation Board go to Options in the top toolbar and select Switch To External Control Mode To control...

Page 8: ...Table 5 User Applications Program Description Register Viewer The Register Viewer displays the current register map data in a table format sorted by reg ister address to provide an overview of the dev...

Page 9: ...Si5328 EVB Rev 0 1 9 8 Schematics Figure 5 Si5328...

Page 10: ...Si5328 EVB 10 Rev 0 1 Figure 6 CPLD and Power...

Page 11: ...Si5328 EVB Rev 0 1 11 Figure 7 MCU...

Page 12: ...7 3 D4 D5 D6 Red Panasonic LN1271RAL 8 2 D7 D8 Yel Panasonic LN1471YTR 9 4 H1 H2 H3 H4 4 10 10 J1 J2 J6 J8 J16 J18 J23 J25 J28 J29 SMA_EDGE Johnson 142 0701 801 11 1 J3 USB FCI 61729 0010BLF 12 9 J4 J...

Page 13: ...con Labs Si5328C C GQ 40 1 U6 TPS76201 TI TPS76201DBVT 41 1 U7 Si8051F340 Silicon Labs C8051F340 GQ 42 1 U8 XC2C128 Xilinx XC2C128 7VQG100I 43 1 U9 74LCX541 Fairchild 74LCX541MTC_NL 44 1 U10 LM1117 Na...

Page 14: ...4 Rev 0 1 10 Related Documents AN775 Si5328 Synchronous Ethernet Compliance Test Report AN776 Using the Si5328 in ITU G 8262 Compliant Synchronous Ethernet Applications Note ITU T G 8262Y 1362 EEC Opt...

Page 15: ...SyncE clock frequencies Also the use of Free Run mode means that at power up the EVB will produce an accurate SyncE clock The power up settings for the Si5328 are as follows 25 MHz input on CKIN1 CKI...

Page 16: ...h which if it fails can be reasonably expected to result in significant personal injury or death Silicon Laboratories products are generally not intended for military applications Silicon Laboratories...

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