AN332
174
Confidential Rev. 0.2
6.3. SPI Control Interface Mode
Figures 9 and 10 show the SPI Control Interface Read and Write Timing Parameters and Diagrams, respectively.
Refer to the Si471x data sheet for timing parameter values.
Figure 9. SPI Control Interface Write Timing Parameters
Figure 10. SPI Control Interface Read Timing Parameters
SPI bus mode uses the SCLK, SDIO and SEN pins for read/write operations. The system controller can choose to
receive read data from the device on either SDIO or GPO1. A transaction begins when the system controller drives
SEN = 0. The system controller then pulses SCLK eight times, while driving an 8-bit control byte serially on SDIO.
The device captures the data on rising edges of SCLK. The control byte must have one of five values:
0x48 = write a command (controller drives 8 additional bytes on SDIO)
0x80 = read a response (device drives one additional byte on SDIO)
0xC0 = read a response (device drives 16 additional bytes on SDIO)
0xA0 = read a response (device drives one additional byte on GPO1)
0xE0 = read a response (device drives 16 additional bytes on GPO1)
For write operations, the system controller must drive exactly 8 data bytes (a command and arguments) on SDIO
after the control byte. The data is captured by the device on the rising edge of SCLK.
SCLK
70%
30%
SEN
70%
30%
SDIO
C7
C0
70%
30%
t
S
C6
–C1
Control Byte In
8 Data Bytes In
D7
D6
–D1
D0
t
S
t
HSDIO
t
HIGH
t
LOW
t
HSEN
Bus
Turnaround
SCLK
70%
30%
SEN
70%
30%
SDIO
or
GPO1
70%
30%
t
HSDIO
Control Byte In
C7
C0
C6
–C1
t
S
t
HSEN
t
S
t
CDZ
t
CDV
16 Data Bytes Out
D7
D6
–D1
D0
