Si4421
Typical TX register usage
et
bit
(enable transmitter)
TX data
SPI commands
(nSEL, SCK, SDI)
enable
Synthesizer / PA
PA
Synt.
nIRQ
SDO**
et
= 1
Power Man
0xAA
TX latch wr
TX byte1
TX byte1
0xAA
Notes:
*T
tx_XTAL_ON
is the start-up time of the PLL + PA with running crystal oscillator
** SDO is tri-state if nSEL is logic high.
et
= 0
Power Man
Conf. Set.
el
= 1
T
tx_XTAL_ON
*
Fraction of the
Dummy byte
TX latch wr
Dummy
TX byte
Do not switch the
et
off here, because the
TX byte1 is not transmitted out
only stored into the internal register!
el
= 0
Conf. Set.
Enabling the Transmitter preloads the TX
latch with 0xAAAA
Note: The content of the data registers are initialized by clearing bit
et
.
A complete transmit sequence should be performed as follows:
a.
Enable the TX register by setting the
el
bit to 1 (
Configuration Setting Command
, page 15)
b.
The TX register automatically filled out with 0xAAAA, which can be used to generate preamble.
c.
Enable the transmitter by setting the
et
bit (
Power Management Command
, page 15)
d.
The synthesizer and the PLL turns on, calibrates itself then the power amplifier automatically enabled
e.
The TX data transmission starts
f.
When the transmission of the byte completed, the nIRQ pin goes high, the SDO pin goes low at the same time. The nIRQ
pulse shows that the first 8 bits (the first byte, by default 0xAA) has transmitted. There are still 8 bits in the transmit
register.
g.
The microcontroller recognizes the interrupt and writes a data byte to the TX register
h.
Repeat f. - g. until the last data byte reached
i.
Using the same method, transmit a dummy byte. The value of this dummy byte can be anything.
j.
The next high to low transition on the nIRQ line (or low to high on the SDO pin) shows that the transmission of the data
bytes ended. The dummy byte is still in the TX latch.
k.
Turn off the transmitter by setting the
et
bit to 0. This event will probably happen while the dummy byte is being
transmitted. Since the dummy byte contains no useful information, this corruption will cause no problems.
l.
Clearing the
el
bit clears the Register Underrun interrupt; the nIRQ pin goes high, the SDO low.
It is possible to perform this sequence without sending a dummy byte (step i.) but after loading the last data byte to the transmit
register the PA turn off should be delayed for at least 16 bits time. The clock source of the microcontroller (if the clock is not supplied
by the Si4421) should be stable enough over temperature and voltage to ensure this minimum delay under all operating
circumstances.
When the dummy byte is used, the whole process is driven by interrupts. Changing the TX data rate has no effect on the algorithm
and no accurate delay measurement is needed.
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