Silicon Laboratories Si3460 User Manual Download Page 14

Page: 14 / 26

S i 3 4 6 0 - E V B

Rev. 1.2

Not Recom

ded

for N

ew D

esigns.

Please Co

er Si3462 for

esigns.

8. Si3460-EVB Schematics and PCB Layout

Full schematics and layout information are provided in the following sections. To ensure you are using the latest
schematic and PCB layout database revisions, download the following zip file from the Silicon Laboratories Si3460
documentation page:

http://www.silabs.com/products/power/poe/Pages/PowerSourcingEquipment.aspx

8.1. Schematics

Drain

DETA

DC1

250K

Drain

Vdd

Vee

Vdd

DC2

PWM

0.5W

0.3V

Schottky

0.5W

Place both near MCU

Vout(+)

Vout(-)

Vin (-)

Vin (+)

Reset

Common mode chokes for GbE midspan

FQD12P10

C19

47u

C19

47u

R44

127

R44

127

R31

NPR31

499

MIC4417

GND

Out

Vcc

CTL

C80.1u

C20

68u

35V

C20

68u

35V

U19A

LM319

U19A

LM319

OUT

V+

V-

C21

0.1u /50V

C21

0.1u /50V

L3B

FA2536-ALD

L3B

FA2536-ALD

R45

20K

R45

20K

C12

10n

C12

10n

0.1u

R41

18.2K

R41

18.2K

R18

100K

R18

100K

D12

SMAJ58A

D12

SMAJ58A

R30

C15

0.1u

C15

0.1u

D13

551-0207

D13

551-0207

R40

332

R40

332

2.49

C17

0.1u

C17

0.1u

Q12

BC856

Q12

BC856

Si3460

GATE

CTRL1

CTRL2

250KHz

DETA

VSENSE

ISENSE

STATUS

RST

VDD

GND

40.2K

RJ45

B2100

66.5K

R22

C70.1u

TLV431

L3A

FA2536-ALD

L3A

FA2536-ALD

R43

1.3k

R43

1.3k

C16

C13

0.1u

C13

0.1u

R24

FQT5P10

0.1u

R42

1.82K

R42

1.82K

R28

330Ohms

C11

27n

C11

27n

10u

L1150uH

R47

1.3k

R47

1.3k

RJ45

C18

0.1u

C18

0.1u

4.7uH

C14

CONN JACK PWR

R27

10.5

R27

10.5

gure

10.

Si3

460 an

d Power Circuit

Summary of Contents for Si3460

Page 1: ...t input and an optional LED status signal is provided to indicate the port status including detect power good and output fault event information for use within the host system The Si3460 is pin programmable to support Endpoint and midspan applications with support for either 10 100BASE T or 10 100 1000BASE T All four classification power levels specified by the IEEE 802 3 standard Classification b...

Page 2: ... scheme implemented on the Si3460 EVB reference design Figure 2 Power Carried Over the Signal Data Pair POWER SOURCING EQUIPMENT PSE POWERED DEVICE PD 48 V _ TX RX 4 5 1 2 3 6 7 8 SPARE PAIR SIGNAL PAIR SIGNAL PAIR SPARE PAIR 4 5 1 2 3 6 7 8 RX TX PD I F and DC DC Converter POWER SOURCING EQUIPMENT PSE POWERED DEVICE PD 48 V TX RX 4 5 1 2 3 6 7 8 SPARE PAIR SIGNAL PAIR SIGNAL PAIR SPARE PAIR 4 5 1...

Page 3: ...lel capacitance of between 0 05 and 0 12 µF An IEEE compliant PSE probes 2 8 and 10 V with at least a 1 V step and current limit of 5 mA The PSE must accept signatures in the range of 19 26 5 k with capacitance of up to 0 15 µF and must reject resistance 15 k or 33 k as well as capacitive signatures 10 µF The strict limits on the detection phase ensure that non PoE enabled devices are not inadvert...

Page 4: ...ms the power may be removed if the maximum power level of either 4 7 or 15 4 W is exceeded If the current exceeds 400 mA the power must be removed in 75 ms For short circuit protection output power is removed immediately if the output current exceeds 800 mA or the output voltage drops below 30 V If power is removed due to an overload condition detection must not be attempted again for at least 2 s...

Page 5: ...three operating modes can be set by the R28 and R30 resistor pair as indicated below Classification level sets what maximum power level the Si3460 will support Endpoint or midspan mode controls the backoff timing per the IEEE specifications Restart action on fault or overload determines whether or not the Si3460 will automatically restart after 2 s when a fault or overload condition e g input UVLO...

Page 6: ... the PWM circuitry is enabled by turning on the 250 kHz clock 250 kHz pin The 250 kHz square wave is converted to a triangular shape by the filter R14 and C6 The dc level set by CTRL1 and CTRL2 is used to control the PWM comparator U19B that drives the switcher FET through gate driver U3 The output voltage is sensed through resistor divider R43 and R44 and the output current is sensed through resi...

Page 7: ...s removed If the output current then exceeds 10 mA for at least 60 ms the power is not removed The Si3460 will continue to provide power unless a disconnect or overload condition is sensed The only other way to force the Si3460 to disconnect power is by doing a reset The relevant waveform is shown in Figure 7 on page 12 5 8 Current Limit Control The Si3460 s overcurrent trip point is determined by...

Page 8: ...or a fault or over current condition has been detected the LED flashes rapidly at 10 times per second This occurs for two seconds for normal error delay and in the case of the restart after a RESET condition the LED will flash rapidly and the detection process will automatically start again after 2 2 s and power will not be provided until an open circuit condition is detected Once the Si3460 EVB d...

Page 9: ...pect to the input voltage The reason this is done is because the Si3460 will often be used in applications and environments where a standard telephone circuit or SLIC such as the Si3210 15 32 33 will be powered from the same 12 to 15 V isolated input power supply Conventionally these circuits produce large negative operating voltages Since the Si3460 EVB reference design is also designed to produc...

Page 10: ...ormal operation Resistors R43 R47 and R44 127 are chosen based on the IEEE minimum disconnect current specifications and to ensure good transient response for sudden load changes To help ensure that heat dissipated by R43 and R47 does not unduly contribute to the heating of the PCB it is recommended to move these resistors away from other heat dissipating components such as switching FET M1 induct...

Page 11: ...rent Waveforms Figures 4 through 9 show output voltage and load current waveforms during startup and fault conditions See the Si3460 EVB schematics in Figures 10 and 11 Figure 4 Waveform Showing Detection Pulse into Open Circuit Figure 5 Output Voltage Waveform Showing both Detection and Classification Pulse during Startup CH1 Output Voltage VOUT CH1 Output Voltage VOUT ...

Page 12: ... e s i g n s P l e a s e C o n s i d e r S i 3 4 6 2 f o r N e w D e s i g n s Figure 6 Waveforms Showing Successful Powerup Figure 7 Disconnect Waveforms with Time Delay of 350 ms CH1 Output Voltage VOUT Load 25 k CH1 Output Voltage VOUT CH2 Load Current IOUT VOUT ...

Page 13: ...s e C o n s i d e r S i 3 4 6 2 f o r N e w D e s i g n s Figure 8 Waveform Showing Overcurrent Disconnect Delay Time of 60 ms Figure 9 Overcurrent during Startup with 400 mA Overload CH1 Output Voltage VOUT CH2 Load Current IOUT VOUT CH1 Output Voltage VOUT CH2 Load Current IOUT VOUT ...

Page 14: ... LM319 OUT 12 4 5 G 3 V 11 V 6 C21 0 1u 50V C21 0 1u 50V L3B FA2536 ALD L3B FA2536 ALD 6 5 4 R45 20K R45 20K C12 10n C12 10n C1 0 1u C1 0 1u R41 18 2K R41 18 2K R18 100K R18 100K D12 SMAJ58A D12 SMAJ58A R30 2K R30 2K C15 0 1u C15 0 1u C4 0 1u C4 0 1u D13 551 0207 D13 551 0207 R40 332 R40 332 R4 2 49 R4 2 49 C17 0 1u C17 0 1u Q12 BC856 Q12 BC856 U2 Si3460 U2 Si3460 GATE 1 CTRL1 2 CTRL2 4 250KHz 5 D...

Page 15: ...49K R19 10K R19 10K R3 10K R3 10K R29 2 15K R29 2 15K R26 10K R26 10K R49 53 6K R49 53 6K R20 10K R20 10K R11 10K R11 10K U19B LM319 U19B LM319 OUT 7 9 10 G 8 V 11 V 6 R16 324K R16 324K C10 470pF C10 470pF C22 0 1u C22 0 1u R48 53 6K R48 53 6K C5 0 015u C5 0 015u R6 1 40meg R6 1 40meg U18A LM2904 U18A LM2904 3 2 V 8 V 4 OUT 1 R13 301K R13 301K R17 100K R17 100K R14 2K R14 2K R9 383K R9 383K R46 2K...

Page 16: ... Rev 1 2 N o t R e c o m m e n d e d f o r N e w D e s i g n s P l e a s e C o n s i d e r S i 3 4 6 2 f o r N e w D e s i g n s 8 2 PCB Layout Figure 12 Top Side Component Placement Figure 13 Top Side Interconnect ...

Page 17: ...Si3460 EVB Rev 1 2 17 N o t R e c o m m e n d e d f o r N e w D e s i g n s P l e a s e C o n s i d e r S i 3 4 6 2 f o r N e w D e s i g n s Figure 14 Si3460 Ground Plane Figure 15 Si3460 Power Plane ...

Page 18: ...Si3460 EVB 18 Rev 1 2 N o t R e c o m m e n d e d f o r N e w D e s i g n s P l e a s e C o n s i d e r S i 3 4 6 2 f o r N e w D e s i g n s Figure 16 Bottom Side Interconnect ...

Page 19: ...e high voltage and low recovery time A Schottky diode works well Diode D12 must not clamp at 57 V and must clamp to 100 V under worst case surge conditions Transistors M1 and M2 are sized for overall efficiency The larger FQD8P10 can be used in both places if desired The FET gate driver should be capable of sinking and sourcing approximately 2 A Heat dissipating components must be separated from e...

Page 20: ...V SOT 223 FQT5P10 Diodes Inc or equiv 1 Q12 BC856 SOT23 BC856A Diodes Inc or equiv 3 R1 R11 R26 10 k 1 RC0603 CR0603 10W 1002F Venkel or equiv 1 R2 24 9 k 1 RC0603 CR0603 10W 1002F Venkel or equiv 1 R3 10 k 1 RC0805 CR0805 8W 1002F Venkel or equiv 1 R4 2 49 1 RC1210 2W CR1210 2W 2R49F Venkel or equiv 1 R5 499 1 RC1210 2W CR1210 2W 4990F Venkel or equiv 1 R6 1 40 M 1 RC0603 CR0603 10W 1404F Venkel ...

Page 21: ...r equiv 2 C4 C9 0 1 µF 100 V 10 X7R 603 C0603X7R101104K Venkel or equiv 1 C5 0 015 µF 16 V 10 X7R 603 C0603X7R160153K Venkel 1 C10 470 pF 100 V 10 X7R 603 C0603X7R101471K Venkel or equiv 1 C19 47 µF 100 V 20 Al Elec 12 5mm EEVFK2A470Q Panasonic 1 D8 B2100 100 V Schottky SMB B2100 Diodes Inc 1 L1 150 µH 2 A DO3340 MSS1278T 154KLD Coilcraft 1 L2 4 7 µH LPS3314 LPS3314 472ML Coilcraft 1 M1 FQD12P10 1...

Page 22: ...chokes 1210 C1210X7R251104K Venkel or equiv 1 S1 Sw_tOpen Mouser 101 0161 1 Power supply 12 V 1 5 A DPS120150U P5P CUI inc BOM Alternates 1 Power supply 12 V 2 5 A EMS120150 P5P SZ CUI inc DMS120250 P5P IC CUI inc 1 C19 39 µF 100 V 20 Al Elec 10 mm EEUFC2A390L Panasonic 1 U3 TPS2828 SOT 23 5pin TPS2828 TI Notes 1 R28 and R30 indicate the classification level Full power midspan configuration is R28...

Page 23: ... 10 mA to comply with the IEEE standard When the Si3460 is applying power to a valid PD the LED is continuously lit After an error condition e g an UVLO or short circuit event is detected the LED flashes at 10 times per second or until a reset is asserted or when an open circuit is detected as determined by the operating mode of the Si3460 Resistors R23 R25 and the programming header J6 are used f...

Page 24: ...0 EVB provides a simple and comprehensive applications solution for PSE systems designers who require IEEE compliant PSE functionality and safe operation with standard telephone interfaces and voltages 13 Ordering Guide Ordering Part Number Description Si3460 EVB Evaluation board for Si3460 single port PSE controller for embedded applications Si3460 XYY GM Refer to the Si3460 data sheet ordering g...

Page 25: ... 23 Reformatted 10 Bill of Materials on page 20 Updated schematics PCB layouts and BOM Revision 0 3 to Revision 1 0 Updated Table 3 on page 6 Updated 5 6 Power Up on page 7 Updated 5 8 Current Limit Control on page 7 Updated 5 10 Status LED Function on page 8 Updated 6 5 EMI and EMC on page 9 Updated schematics Removed R31 Updated 10 Bill of Materials on page 20 Revision 1 0 to Revision 1 1 Update...

Page 26: ...sumes no responsibility for errors and omissions and disclaims responsibility for any consequences resulting from the use of information included herein Additionally Silicon Laboratories assumes no responsibility for the functioning of undescribed fea tures or parameters Silicon Laboratories reserves the right to make changes without further notice Silicon Laboratories makes no warran ty represent...

Search results

Summary of Contents for Si3460

Reviews:

Related manuals for Si3460

Brands by name

Popular brands

Silicon Laboratories Si3460, User Manual

Search results

Summary of Contents for Si3460

Reviews:

Related manuals for Si3460

Brands by name

Popular brands