Si2401
36
Preliminary Rev. 0.9
S37
0x37
CDR
Carrier detect return. Minimum length of time that a carrier must
return and be detected in order to be recognized after a carrier
loss is detected
(5/3 ms units).
0x20
S39
0x39
CDT
Carrier detect timeout. Amount of time modem waits for carrier
detect before aborting call (1 second units).
0x3C
S3A
0x3A
ATD
Delay between going off-hook and answer tone generation when
in answer mode (53.33 ms units).
0x29
S3B
0x3B
RP
Minimum number of consecutive ring pulses per ring burst.
0x03
S3C
0x3C
CIDG
This is a bit mapped register.
*
0x01
S62
0x62
RC
This is a bit mapped register.
*
0x41
S82
0x82
IST
This is a bit mapped register.
*
0x08
SDB
0xDB
LVS
Line Voltage Status. Eight bit signed, 2s complement number
representing the tip-ring voltage. Each bit represents 1 volt.
Polarity of the voltage is represented by the MSB (sign bit).
0000_0000 = Measured voltage is < 3 V.
SDF
0xDF
DGSR
This is a bit mapped register.
*
0x0C
SE0
0xE0
CF1
This is a bit mapped register.
*
0x22
SE1
0xE1
GPIO1
This is a bit mapped register.
*
0x04
SE2
0xE2
GPIO2
This is a bit mapped register.
*
0x00
SE3
0xE3
GPD
This is a bit mapped register.
*
0x00
SE4
0xE4
CF5
This is a bit mapped register.
*
0x00
SE5
0xE5
DADL
(SE8 = 0x00) Write only definition. DSP register address lower
bits [7:0].
*
0x00
SE5
0xE5
DDL
(SE8 = 0x01) Write only definition. DSP data word lower bits
[7:0].
*
0x00
SE5
0xE5
DSP1
(SE8 = 0x02) Read only definition. This is a bit mapped register.
1
0x00
SE5
0xE5
DSP2
(SE8 = 0x02) Write only definition. This is a bit mapped register.
1
0x00
SE6
0xE6
DADH
(SE8 = 0x00) Write only definition. DSP register address upper
bits [15:8].
0x00
SE6
0xE6
DDH
(SE8 = 0x01) Write only definition. DSP data word upper bits
[13:8]
0x00
SE6
0xE6
DSP3
(SE8 = 0x02) Write only definition. This is a bit mapped register.
1
0x00
SE8
0xE8
DSPR4 Set the mode to define E5 and E6 for low level DSP control.
0x00
Table 21. S-Register Summary (Continued)
“S”
Register
Register
Address
(hex)
Name
Function
Reset
*Note:
These registers are explained in detail in the following section.