C 8 0 5 1 F 9 6 x / S i 1 0 2 x
Rev. 0.2
35
38
EMIF_A4
EMIF D4/AD4
39
EMIF_A3
EMIF D3/AD3
40
EMIF_A2
EMIF D2/AD2
41
EMIF_A1
EMIF D1/AD1
42
EMIF_A0
EMIF D0/AD0
43
EMIF_WRB
EMIF write signal (active low)
44
EMIF_OEB
EMIF Read (active low)
45
EMIF_ALE
EMIF address latch enable
46
EMIF_CS0B
47
EMIF_BE1B
48
EMIF_CS1B
49
EMIF_BE0B
50
GND
51
LCD_SEG00_A
52
LCD_SEG01_A
53
LCD_SEG02_A
54
LCD_SEG03_A
55
LCD_SEG04_A
56
LCD_SEG05_A
57
LCD_SEG06_A
58
LCD_SEG07_A
59
LCD_SEG08_A
60
LCD_SEG09_A
61
LCD_SEG10_A
62
LCD_SEG11_A
63
LCD_SEG12_A
64
LCD_SEG13_A
65
LCD_SEG14_A
66
LCD_SEG15_A
67
LCD_SEG16_A
68
LCD_SEG17_A
69
LCD_SEG18_A
70
LCD_SEG19_A
71
LCD_SEG20_A
72
LCD_SEG21_A
73
LCD_SEG22_A
74
LCD_SEG23_A
Table 5. UDP C8051F960/Si1020 MCU Card with EMIF H2 Pin Descriptions (J2)
MCU Card
Pin
Signal Name
Description
Summary of Contents for C8051F960
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