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C8051F064-EK

Rev. 0.4

7

7.  Using the Keil Software 8051 Tools with the Silicon Laboratories IDE

To perform source-level debugging with the IDE, you must configure the Keil 8051 tools to generate an absolute
object file in the OMF-51 format with object extensions and debug records enabled. You may build the OMF-51
absolute object file by calling the Keil 8051 tools at the command line (e.g., batch file or make file) or by using the
project manager built into the IDE. The default configuration when using the Silicon Laboratories IDE project
manager enables object extension and debug record generation. Refer to Application Note "AN104: Integrating Keil
8051 Tools into the Silicon Labs IDE" in the “

SiLabs\MCU\Documentation\ApplicationNotes

” directory for additional

information on using the Keil 8051 tools with the Silicon Laboratories IDE. 

To build an absolute object file using the Silicon Laboratories IDE project manager, you must first create a project.
A project consists of a set of files, IDE configuration, debug views, and a target build configuration (list of files and
tool configurations used as input to the assembler, compiler, and linker when building an output object file).

The following sections illustrate the steps necessary to manually create a project with one or more source files,
build a program, and download the program to the target in preparation for debugging. (The IDE will automatically
create a single-file project using the currently open and active source file if you select 

Build/Make Project

 before a

project is defined.) 

7.1.  Creating a New Project

1. Select 

Project

New Project

 to open a new project and reset all configuration settings to default.

2. Select 

File

New File

 to open an editor window. Create your source file(s) and save the file(s) with a 

recognized extension, such as .c, .h, or .asm, to enable color syntax highlighting.

3. Right-click on “New Project” in the 

Project Window

. Select 

Add files to project

. Select files in the file browser 

and click Open. Continue adding files until all project files have been added.

4. For each of the files in the 

Project

 

Window

 that you want assembled, compiled, and linked into the target build, 

right-click on the file name and select 

Add file to build

. Each file will be assembled or compiled as appropriate 

(based on file extension) and linked into the build of the absolute object file.

Note:

 If a project contains a large number of files, the “Group” feature of the IDE can be used to organize.

Right-click on “New Project” in the 

Project Window

. Select 

Add Groups to project

. Add pre-defined groups

or add customized groups. Right-click on the group name and choose 

Add file to group

. Select files to be

added. Continue adding files until all project files have been added.

7.2.  Building and Downloading the Program for Debugging

1. Once all source files have been added to the target build, build the project by clicking on the 

Build/Make 

Project 

button in the toolbar or selecting 

Project

Build/Make Project 

from the menu.

Note:

 After the project has been built the first time, the 

Build/Make Project

 command will only build the files 

that have been changed since the previous build. To rebuild all files and project dependencies, click on the 

Rebuild All

 button in the toolbar or select 

Project

Rebuild All

 from the menu.

2. Before connecting to the target device, several connection options may need to be set. Open the 

Connection 

Options

 window by selecting 

Options

Connection Options. . .

 in the IDE menu. First, select the appropriate 

adapter in the “Serial Adapter” section. Next, the correct “Debug Interface” must be selected. C8051F06x family 
devices use the JTAG debug interface. Once all the selections are made, click the OK button to close the 
window. 

3. Click the 

Connect

 button in the toolbar or select 

Debug

Connect

 from the menu to connect to the device. 

4. Download the project to the target by clicking the 

Download

 

Code

 button in the toolbar.

Note:

 To enable automatic downloading if the program build is successful, select 

Enable automatic connect/

download after build

 in the 

Project

Target Build Configuration

 dialog. If errors occur during the build 

process, the IDE will not attempt the download.

5. Save the project when finished with the debug session to preserve the current target build configuration, editor 

settings and the location of all open debug views. To save the project, select 

Project

Save Project As. . .

 

from the menu. Create a new name for the project and click on 

Save

.

Summary of Contents for C8051F064-EK

Page 1: ...les and register definition files Documentation Evaluation Kit Demos C8051F064 ADC Demo USB Cable C8051F064 Evaluation Kit User s Guide 3 Kit Overview Figure 1 illustrates the block diagram of the C8051F064 Evaluation Kit The board includes an analog front end to signal condition and digitize through the C8051F064 analog input signals The board also includes two USB ports to transfer conversions t...

Page 2: ... sampled standard deviation and dynamic range are displayed To run the ADC Demo first configure the evaluation board and install the PC application 4 1 ADC Demo Hardware Setup Configure the evaluation board according to the instructions below A diagram of the final configuration is shown in Figure 2 Configuration shorting blocks may already be installed 1 Place a shorting block on the J2 header co...

Page 3: ...unning the ADC Demo Software To run the demo run the installed application When executed the following occurs automatically 1 Firmware is downloaded to the C8051F064 FLASH code memory 2 The C8051F064 s 8051 MCU executes the firmware to configure the 16 bit ADC direct memory access DMA interface and parallel interface to store samples in the onboard SRAM 3 The ADCs sample a dc voltage 32 768 sample...

Page 4: ... Follow the steps to copy the driver files to the desired location The default directory is C SiLabs MCU CP210x 2 The final window will give an option to install the driver on the target system Select the Launch the CP210x VCP Driver Installer option if you are ready to install the driver 3 If selected the driver installer will now launch providing an option to specify the driver installation loca...

Page 5: ...atively supported tools is as follows Keil IAR Raisonance Tasking Hi Tech SDCC The demo applications for the C8051F064 evaluation board are written to work with the Keil and SDCC toolsets 6 2 Keil Evaluation Toolset 6 2 1 Keil Assembler and Linker The assembler and linker that are part of the Keil Demonstration Toolset are the same versions that are found in the full Keil Toolset The complete asse...

Page 6: ...specific Silicon Laboratories MCU The program is configurable to provide the output in C or assembly For more information refer to the Configuration Wizard 2 help available under the Help menu in Config Wizard 2 6 4 Keil uVision2 and uVision3 Silicon Laboratories Drivers As an alternative to the Silicon Laboratories IDE the uVision debug driver allows the Keil uVision IDE to communicate with Silic...

Page 7: ...ompiled and linked into the target build right click on the file name and select Add file to build Each file will be assembled or compiled as appropriate based on file extension and linked into the build of the absolute object file Note If a project contains a large number of files the Group feature of the IDE can be used to organize Right click on New Project in the Project Window Select Add Grou...

Page 8: ...r and bit names are identical to those used in the C8051F06x data sheet Both register definition files are also installed in the default search path used by the Keil Software 8051 tools Therefore when using the Keil 8051 tools included with the evaluation kit A51 C51 it is not necessary to copy a register definition file to each project s file directory 8 2 Blinking LED Example The example source ...

Page 9: ...ctions J2 Evaluation board power supply selector J3 Analog I O terminal block J4 External voltage reference supply selector J5 External conversion start header J7 DATA USB port connector for data communications with the PC J6 J8 Op amp supply voltage headers J11 J14 External memory interface connectors J12 J13 ADC1 ADC0 BNC connectors for analog inputs J15 Port 0 header J16 ADC differential input ...

Page 10: ...n the port pin Four LEDs are also provided on the evaluation board D1 The bi color LED labeled Run Stop indicates communications between the PC and the DEBUG USB port D2 The red LED D2 reflects the state of the SUSPEND signal of the DATA port device D3 The green LED labeled P1 6 is connected to the C8051F064 s GPIO pin P1 6 D4 The red LED labeled PWR indicates a power connection to the evaluation ...

Page 11: ...block on J6 to connect the V op amp supply to AV Additionally place a shorting block on J8 to connect the V op amp supply to GND Provide a dual supply voltage to the op amps for optimal performance by removing the shorting blocks on headers J6 and J8 To supply the voltages 5 V and 5 V signals will need to be provided at the J3 terminal block Pin 1 and Pin 2 Note Remove shorting blocks from J6 and ...

Page 12: ...fer to Table 4 for the external memory interface signal descriptions 9 8 PORT I O Connectors J15 The Port 0 signals on the C8051F064 have their own 10 pin header J15 This header provides a pin for each of the corresponding port pins 0 7 3 3 V and digital ground See Table 5 for the J15 pin connections Table 4 External Memory Interface Signal Descriptions SRAM Signal C8051F060 Signal Description WE ...

Page 13: ...ween these ports Each configuration includes an on board voltage regulator to supply 3 3 V to the board To power the 3 3 V supply from the DATA port place a shorting block on J2 Pin 1 and Pin 2 To supply the 3 3 V supply from the DEBUG port place a shorting block on J2 Pin 2 and Pin 3 Note If supplying the 3 3 V supply from an off board source via the J3 terminal block do not place a shorting bloc...

Page 14: ...C8051F064 EK 14 Rev 0 4 10 Schematics Figure 5 C8051F064 Evaluation Board Schematic Page 1 ...

Page 15: ...C8051F064 EK Rev 0 4 15 Figure 6 C8051F064 Evaluation Board Schematic Page 2 ...

Page 16: ...C8051F064 EK 16 Rev 0 4 Figure 7 C8051F064 Evaluation Board Schematic Page 3 ...

Page 17: ... to Revision 0 4 Added Relevant Devices section Changed Section 3 to Getting Started Updated Section 4 to include latest VCP driver installation instructions Changed Section 6 to Software Overview Updated Evaluation Compiler restrictions in Section 6 2 2 Added overview of Configuration Wizard 2 and Keil uVision Drivers to section 6 Created new Section 7 ...

Page 18: ...or health which if it fails can be reasonably expected to result in significant personal injury or death Silicon Laboratories products are generally not intended for military applications Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including but not limited to nuclear biological or chemical weapons or missiles capable of delivering such weapons...

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