AN726
Rev. 0.1
15
5.8. Play/Record Flash Mode
In play/record flash mode, the system samples and outputs data at 9.6 kHz.
Figure 16. Play/Record Flash Mode Block Diagram
For playing, the firmware reads the compressed data from the flash, decompresses the data using µLaw, performs
the EWMA algorithm, quantizes the data to 9 bits, and outputs the PWM waveform on the EPCA0 module. The
remainder-weighted dithering algorithm is not used at all in this mode since the data LSBs will often be 0’s from the
compression algorithm.
For recording, the firmware measures the microphone (MK1) using one SARADC module, compresses the data
using µLaw, and stores the data in flash.
Figure 17 shows the data flow for the play/record flash mode.
Figure 17. Play/Record Flash Mode Flow Diagram
Class-D RD Board
SiM3U1xx
SARADC0
EPCA
Flash
R
L
MIC
SiM3U1xx
Flash
12-bit
quantization
9-bit
quantization
µLaw
decompression 8
bits to 14 (signed)
EPCA
EWMA
hardware
gain stage
SARADC0
convert from 12
bits unsigned to
14 signed
µLaw compression
14 bits to 8 (signed)
R
L
MIC
Summary of Contents for AN726
Page 27: ...AN726 Rev 0 1 27 NOTES ...