SC5312A Operating & Programming Manual
Rev 1.0.2
11
the signal harmonics. Reducing the harmonics produc
es a “purer” signal tone, improving the duty cycle of
the LO as it drives the mixers of the demodulator. Additionally, the LO signal can be passed out of the
device via the
“LO o
ut
” port. This output can be used as the input LO
source for another demodulator, for
example. Driving multiple demodulators with the same derived LO signal optimizes phase coherency
between them. When this port is not in use, it is highly recommended to terminate it into a 50
W
load.
IF Output Section
The IF outputs are differentially driven. Each of the in-phase and quadrature components of the
demodulator is conditioned prior to leaving the IF ports. The user can programmatically adjust the
parameters of the differential signal such as the common output voltage, DC offset between the (-) and
(+) terminals, and its amplitude. The differential output impedance of each component is 100
W
. However,
all ports can be operated as single-ended 50
W
ports. All unused ports should be terminated into 50
W
loads.
There are voltage DACs within the device to control the signal parameters of each of the IQ components.
For each component, the Vcom (common voltage) DAC controls the common output voltage of the
differential outputs. The Vcom DAC values range from 0 to 16383 (14 bits) and change the voltage
between 1 V to 3.5 V. For a wider output voltage swing range, this voltage should be set to around 2.4 V
to 2.5 V. Having a wider swing range improves the output compression point of the device. This is not a
hard requirement and the user will need to adjust the voltage levels to suit their specific requirements.
As an example, setting to some other voltage may be required to optimize the dynamic range of the
receiving digitizer and therefore, better optimize the entire system.
DC offsets may limit the dynamic range of the receiving digitizer, and where it is critical the user can
“
tune
out
”
to minimize these offsets using the DC Offset DAC. This 14 bit DAC can correct offsets up to +/-0.050
V with about 0.020 mV resolution.
The IF amplifiers have an adjustable gain range of 15.75 dB with a tuning resolution of 0.25 dB. The gain
is controlled by programming a 6-bit DAC whose codes range from 0 to 63. Writing 63 to the DAC provides
the highest gain. Increasing the IF gain instead of the RF gain to achieve a required IF level will improve
the linearity of the system, but with the chance of a slight increase in output noise. For a common output
voltage of 2.4 V, the output compression/saturation point of the amplifier is around 10 dBm. It is
recommended to operate the output at least 6 dBm below this value to avoid running into saturation from
signals with high crest factors. When deciding the operating point of the digitizer, it is recommended that
the user not operate the output voltage too close to the saturation point of the digitizer input.
The linearity DAC controls the current flow through the demodulator core and thus affects the linearity
of the device. Generally, increasing the voltage results in higher the current consumption, and as a result
the linearity improves. However slight adjustments to the voltage may improve the linearity further; this
is dependent on the frequency and input power.
