EAN-DRS-Cameras
© SightLine Applications, Inc.
1
1
Overview
This document describes how to configure the SightLine OEM video processing boards to receive video
from DRS cameras. See
for the complete list of supported DRS cameras.
SightLine OEM boards configured in this document: 1500-0EM, 3000-OEM, 4000-OEM.
1.1
Additional Support Documentation
Additional Engineering Application Notes (EANs) can be found on the
SightLine Applications website.
The
provides a complete overview of settings and dialog windows located in the
Help menu of the Panel Plus application.
The Interface Command and Control
describes the native communications protocol used by the
SightLine Applications product line. The IDD is also available as a PDF download on the
page under Software Support Documentation.
1.2
SightLine Software Requirements
for specific OEM Sightline software version requirements for
supported cameras.
Licensing:
The 14 and 16-bit mode requires license for feature E High Depth + Temp.
Superframe requirements:
1500-OEM: Version 2.22.06 and later for Superframe and FPGA firmware version 5 or 12.
3000-OEM: Version 2.22.13 and later for Superframe. (REV C) requires firmware 2.24.xx and higher.
IMPORTANT:
The Panel Plus software version should match the firmware version running on the
board. Firmware and Panel Plus software versions are available on the
1.2.1
FPGA - 1500-OEM
Version 5 of the FPGA driver firmware is required for the camera to operate correctly with the 1500-
OEM. Version information is located on the
Connect
tab under the
Video Output
Figure 1: FPGA Version Number Location
2
Safe Device Handling
CAUTION:
To prevent damage to hardware boards, disconnect all input power to OEMs and adapter boards before
connecting or disconnecting cables including all FFC, FPC, KEL, HDMI, and round wire (Molex) cables.
CAUTION:
To prevent damage to hardware boards, use a conductive wrist strap attached to a good earth ground.
Before picking up an ESD sensitive electronic component, discharge built up static by touching a grounded bare
metal surface or approved antistatic mat.
Firmware Ver: 3.3.1.6 FPGA:05, temp: 98°F [37°C]
SVN Revision: 58309, Build Date: 01/11/2021, Build Time: 4:48:51