32
SiFive Core IP FPGA Eval Kit User Guide v3p0
Table 9.2:
Core IP FPGA Eval Kit Local Interrupts Mapping
Hardware Input
Local
Interrupt
Number
(Index
in
mip
,
mie
,
registers)
Switch 0
16
Switch 1
17
Switch 2
18
Switch 3
19
Button 0
20
Button 1
21
Button 2
22
Button 3
23
PMOD A[0]
24
PMOD A[1]
25
PMOD A[2]
26
PMOD A[3]
27
PMOD A[4]
28
PMOD A[5]
29
PMOD A[6]
30
PMOD A[7]
31
Summary of Contents for E2* Core IP Series
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