– 15 –
SD-AT1000
Figure 15 BLOCK DIAGRAM (4/10)
+5V(A)
+2.5V(D)
+3.3V(D)
+3.3V(D)
+3.3V(D)
+2.5V(A)
+2.5V(A)
+2.5V(A)
+2.5V(A)
IX0446AW
3
1
SI3033LUS
3
1
8
7
6
4
3
2
1
14 13 12 11
9
8
7
6
5
4
3
2
1
CS493264
44
43
42
41
40
28 27 26 25 24 23 22 21 20 19 18
6
5
4
2
1
2
2
39
36
35
34
30
29
7
8
9
10
11
12
13
14
15
16
17
DSP_SCCLK
DSP_INTREQ
_DSP_INTREQ
EX_CLK
_DSP_SCDOUT
_DSP_CS
_DSP_SCDIN
DSP_SCDIN
DSP_SCDOUT
DSP_CS
_DSP_SCCLK
DSP_RESET
LRCK
SCLK
MCLK
AUDATA1
AUDATA0
_DSP_SCDIN
/EMWR
/EMOE
/EXTMEM
EMAD0
EMAD1
_DSP_INTREQ
_DSP_SCDOUT
_DSP_CS
_DSP_SCCLK
EMAD5
EMAD3
EMAD6
EMAD4
EMAD7
EMAD2
AUDATA2
LRCK
SDATA1
SCLK
LRCK
SCLK
SDATA1
12.288 MHz
DSP
1A
1Y
2A
3A
3Y
GND
VCC
SCLKN2
LRCLKN2
SDATAN2
SCCLK
SCDIN
SCDOUT
CS
INTREQ
EXTMEM
SDATAN1
SCLKN1
LRCLKN1
D0
D1
D2
D3
D4
D5
D6
D7
RD
WR
MCLK
SCLK
LRCLK
AUDATA0
AUDATA1
AUDATA2
CLKIN
RESET
AGND
VA
DGND3
DGND2
DGND1
VD3
VD2
VD1
VCC
GND
IC103
TC7WU04U
DUAL2-INPUT
NAND GATE
IC104
74HC07AF
BUFFER AMP.
IC111
IC112
D104
D105
ZD101
IC101
XL101
VOLTAGE
REGULATOR
3.3V
REGULATOR
Summary of Contents for SD-AT1000
Page 56: ...SD AT1000 56 M E M O ...
Page 70: ...SD AT1000 13 M E M O ...
Page 71: ...SD AT1000 14 M E M O ...